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SN65DP159: DP159RGZEVM J2 Pin13 and Pin14

Part Number: SN65DP159

My design uses an SN65DP159RSBR to interface with a SMARC standard SBC card. On the DP side, the following signals are passed to the CPU on the SBC.

1. DP0+/- (Pins 6,7)

2. DP1+/- (Pins4,5)

3. DP2+/- (Pins1,2)

4. DP3+/- (Pins9,10)

5. DP_AUX_+/- (Pins38,39)

6. HPD (Pin 3)

I compared what signals we feed to the SBC with what signals are fed to the DP J2 connector on the EVK. I noticed that all signals are there, except pins 13 and pin14 on J2. The EVM calls these pins CAD (GND) and  DP_CEC (GND). By DP standard, they are CONFIG1 and 2 pins and should be connected to GND. However, I noticed that they are actually pulled up to 3V3 via 100k and 27k. Since my board does not send these signals to the DP source, I was wondering if the video transmission can work without these two signals.

To that end, I spliced a DP cable and soldered all signals together, as a control case. The transmission worked (ie: DP source was displayed on HDMI sink monitor).

I then desoldered just these two signals. The transmission did not work.

I then resoldered CAD (GND). The transmission worked.

I then desoldered CAD (GND) and resoldered DP_CEC (GND). The trasnmission failed again.

This tells that DP_CEC (GND) is not necessary to make transmission work, but CAD (GND) is necessary. What does the 100k on this signal do exactly? Why is it not connected to GND per DP spec?

Best regards,

Lu Tan

  • Lu Tan

    DP159 is a DP++ or dual mode cable adaptor. The DP++ Source device discovers the presence of a dual-mode cable adaptor by detecting CONFIG1 or CAD (Cable Adaptor Detect) voltage level.

    • If the voltage on CONFIG1 is above VIH, the cable adaptor is plugged

    • If the voltage on CONFIG1 is below VIL, the cable adaptor is not plugged

    So having 100k pull up to 3.3V on the CONFIG1 pin would make it go above VIH and DP++ source will recognize the DP159 a cable adaptor is plugged.

    Thanks

    David

  • Is the 100k PU on CAD pin necessary for DP++ to work on this IC? Like I mentioned in my post, I am connecting this IC to a SMARC standard board, whose CPU does not have a CAD pin. I will have to double check this with the vendor.

  • Lu Tan

    Per the DP++ spec, the upstream-facing CONFIG1 or CAD signal must include a 100kΩ +/-10% pull-up resistor terminated to DP_PWR. This provides a cable adaptor detection mechanism for the dual-mode Source.

    Thanks

    David