DP83849I: Confused - The PHY Address pins are shared with the RXD pins

Hello, greetings from Istanbul
Pin No. 4 PHYAD1 (RXD0_A) and Pin No.5 PHYAD2 (RXD1_A) both shared Strap PHY Address select option and RMII Mode receive data signals, RXD[1:0] at MAC-A Port
By default These pins are PD. And i would like to Pull them up by 10K Resistors to state these lines at High states for MAC receiving side. 
In this case, how do these two pins affect the PHY address when other PHY address pins are keep default in the following scheme position ?
Or If i pull them up by 2K2 do i have problem at mac RX line side ?



Best Regards
Volkan