TLIN1431-Q1: CRC mode

Razvan Badiu

Part Number: TLIN1431-Q1

I am currently working on a project with TLIN1431 SBC from TI.

Because of ASIL requirements we have enabled CRC mode for the SPI communication CRC_CNTL Ah address bit 0: CRC_EN set to 1 during the initialization phase.

During normal functionality everything is fine, this bit is reset along with the microcontroller.

But in case of an error(watchdog reset for example) the bit is already set but the microcontroller starts without knowing the bit state.

How should the microcontroller handle this use case ?

Thank you,

Razvan

6 months ago

0 Sean Guo 6 months ago

TI__Genius 16770 points

Hi Razvan,

One of our SBC expert is looking into that and will reply soon.

Regards,

Sean

0 Danny Bacic 6 months ago

TI__Mastermind 26496 points

Razvan,

One way that we've seen users test their communication at startup (or otherwise) is to execute a write/read cycle using register 0x0F "Scratch_Pad_SPI" to confirm SPI operation. This is a good start-up routine that can confirm the setting of your SPI configuration.

Best,

Danny

0 Razvan Badiu 6 months ago in reply to Danny Bacic

Prodigy 20 points

So a read/write command will trigger the SPIERR flag if CRC is enabled and is missing from the command.

Then I should clear it and continue with the correct setting?

Is this the desired behavior ?

+1 Danny Bacic 6 months ago in reply to Razvan Badiu

TI__Mastermind 26496 points

Razvan,

Yes, this is a way to accomplish that. Basically it's somewhat like a case condition. And if both CRC and non-CRC attempts fail, then the MCU could conclude that there is a fatal SPI error (rather than just a CRC mismatch).

Best,

Danny

0 Razvan Badiu 6 months ago in reply to Danny Bacic

Prodigy 20 points

ok, thank you !

Interface

Interface forum

TLIN1431-Q1: CRC mode