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PCA9539: I2C bus failure with PCA9539 and TCA9617B

Jeff Zhang
Prodigy 30 points
Part Number: PCA9539
Other Parts Discussed in Thread: TCA9617B

Hi,

I am testing a board and see some signal integrity issues with I2C bus. In our design, we use FPGA as I2C master with open-drain on I2C bus. we have PCA9539 for IO expansion. we also have TCA9617B as I2C driver for a motion sensor with 2meters cable. 

The issue we have are contention and large undershooting on I2C Bus. The function of I2C bus is also not stable. working most time but sometimes failed.

The signal of SDA looks like this:

I have reviewed TI app notes slyt770. Based on this app notes, the contention is caused by the Master output and slave output are turned on at same time. I checked the FPGA master side, it is open-drain. It seems something to do with slave devices. We believe this causes the I2C bus failed sometimes. Now my question is, why is it happen and how we can fix it? 

Beside contention issue, we also see large undershooting on I2C signals. The I2C bus is 2.5V. The master and slaves are on different boards with board-board connectors. 

Any help will be much appreciated. 

Jeff

  • 0
    TI__Mastermind 33553 points

    Hi Jeff,

    This offset looks to be an ACK bit when the FPGA sends an ACK bit from A-side to B-side of the TCA9617B. Do we have a schematic from the customer? 

    TCA9617B i2c buffer has a static voltage offset present on the B-side of the buffer.

    This voltage is any where from 0.48V to 0.58V depending on the IOL. 

    Given that VCC = 2.5V, a valid VIL for this voltage supply level is 30% of VCC = 0.30 * 2.5 = 0.75V. This SVO level is lower than that, so this is not a logic issue from a VOL standpoint. 

    Do we have scope captures with both the data and clock lines? 

    I am not sure that this is an issue of bus contention. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    Prodigy 30 points

    Hi Tyler,

    Thanks for your reply. 

    you mentioned there is static voltage offset on the B-side. The screenshot above is on A-side. Does A-side also have any voltage offset?

    The B-side waveform looks no issue. 

    I also tried TI I2C designer tool. Here is the I2C structure:

    We have 10kohm pullup at master side. it seems too big based on the recommended value by TI tool. Do you think if changing pullup resistors will help?

    Btw, we have two more TCA9617B in paralle with first one. But there is only one enabled in anytime.

    Jeff

  • 0 in reply to Jeff Zhang
    TI__Mastermind 33553 points

    Hi Jeff,

    Jeff Zhang said:
    you mentioned there is static voltage offset on the B-side. The screenshot above is on A-side. Does A-side also have any voltage offset?

    A-side does not have a large static voltage offset. It does have a VOLA = 0.1 V typical. This step that we are seeing looks to be the result of some static voltage offset, or there is contention. The problem with contention, is that I2C is an open-drain protocol. The TCA9617B can only drive a LOW logic signal. It releases HIGH as do most I2C devices. Is there any push-pull driver on the I2C bus? 

    Changing the pull-up resistors might help, but 10kohm seems pretty weak for that high of a VOL. Also, pull-up resistors would not cause this step like voltage in the waveform. This is either the result of a SVO from one of the buffers, or there is actual contention from two devices where one device has push/pull circuitry for its driver. 

    We could try varying the pull-up resistors on both sides of the buffer, but I don't see this being an issue. 

    Are we leaving out any devices on the i2c bus that implement rise-time circuitry? 

    Regards,

    Tyler