XIO2001: Voltage leaks into the PCI pin

Masakazu Kitagawa

Prodigy 20 points

Part Number: XIO2001

Hi Team,

Please tell me about the XIO2001.

In our design, Voltage from the PCI Device A leaks into the PCI pin while Power-on.

Is the following waveform acceptable?

Best Regards,

Kitagawa

over 1 year ago

0 Nasser Mohammadi over 1 year ago

TI__Guru* 93570 points

Greetings Kitagawa-San,

I believe as long as PERST# signal timing is met this should be ok. During this transition and after PERST# signal should be asserted. Please note figure 6-1 of the data sheet:

Regards, Nasser

0 Masakazu Kitagawa over 1 year ago in reply to Nasser Mohammadi

Prodigy 20 points

Hi Nasser,

Thank you for your reply.

Does that mean that the inside of the PCI pin does not damaged while PERST# is asserted.

Best Regards,

Kitagwa

0 Nasser Mohammadi over 1 year ago in reply to Masakazu Kitagawa

TI__Guru* 93570 points

Hi Kitagawa-San,

Your understanding is correct. During PERST# there could be transitions on supply and reference clock. We do not expect to cause part damage. Also, there has not been a report of this as well.

Regards, Nasser

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XIO2001: Voltage leaks into the PCI pin