LMH1297: What is the aquisition_reset in Config IO 0x00 BIT0

Hi Murai,

The supporting engineer is currently out of office on business travel. I expect he can get back to you late this week or early next week.

Best,

Lucas

Hi Nick,
Should it be usually set back to 0? However I use it with '1', the compatibility issue will be  improved. 

While this register set to 1, the adaptive EQ is disabled that becomes a fixed EQ setting?

It seems to me that the adaptive EQ setting is inadequate.

Best Regards,
Murai

Hi Nick,

>Do you change the data rate during the device operation?
Yes, such as 12G <-> 3G. It is usual operation.  I have this issue only in 12G-SDI.

>I think it is self clearing.
It seems that it is not cleared itself.  Please see the attached PDF.

Can I use it with Config IO 0x00 BIT0=1? System compatibility is better than Config IO 0x00 BIT0=0.

Best Regards,

Murai

LMH1297_What is the aquisition_reset in Config IO 0x00 BIT0.pdf

Hi Nick,

Let me confirm the rate change operation again.

If input data rate is changed, setting Config IO 0x00 BIT0 is needed ?

For example;

- input signal is changed from 3G to 12G.

- Config IO 0x00 BIT0 = 1

- Config IO 0x00 BIT0 = 0

I think that the rate change is usual situation. So I don't care for this setting today.

There is also, according to the Programming Guide, this register is used for EQ Auto-Bypass for the data rate < 3G.

Is it essential to usual rate change?

Best Regards,

Murai

Hi Murai,

TI recommends issuing CDR Reset and Release after changing register settings that alter the CDR state machine like changing the data rate, but changing the Config IO 0x00 BIT0 is not needed.

The reason that the Cable EQ auto-bypass threshold setting has the reset bit of Config IO 0x00 BIT0 is because it is an operation that has to do with the EQ block of the retimer, not the CDR block. 

Does that make sense?

Best Regards,

Nick

Hi Nick,

>>Yes, such as 12G <-> 3G. It is usual operation.  I have this issue only in 12G-SDI.

>Then the degradation in eye quality could be due to these rate changes.

What does it mean?

I would like to make sure if any register setting is needed with rate change. 

Best Regards,

Murai

Hi Murai,

Masaaki MURAI said:

>Then the degradation in eye quality could be due to these rate changes.

What does it mean?

I would like to make sure if any register setting is needed with rate change. 

TI recommends issuing CDR Reset and Release after changing register settings that alter the CDR state machine like changing the data rate.

Masaaki MURAI said:

>Then the degradation in eye quality could be due to these rate changes

To clarify, I meant that higher data rates can have worse eye performance but if you change data rates and perform a CDR reset you are more likely to get a lock on the next signal.

The Config IO 0x00 BIT0 is about resetting the EQ block so that the EQ value can re-adjust. The EQ value should not change unless their is a change to cable length. Do you change the cable length at all?

Best Regards,

Nick

Hi Nick,

Once the cable is connected, I won't change the cable length. 

I understand that any setting is not needed with rate change.

Best Regards,

Murai