Hi Team,
The customer uses PHY at RGMII 100Mbps.
They would like to shift the clock by 90 degree relative to the Tx/Rx data.
90 degree shift of 100Mbps (Clock 25MHz) is 10ns.
However, the values that can be set in shift mode (Register 0x0086) are from 0.25ns to 4ns.
1) Even if it cannot be shifted 90 degree completely, is there no problem as long as setup/hold is met?
2) If the answer of #1 is NO, is there a way to set a 90 degree shift (10ns) for 100Mbps (Clock 25MHz)?
3) Which does Tx_D(input) of PHY latch at the rising edge or falling edge of the clock?
Best Regards,
