Other Parts Discussed in Thread: SN65HVD1787,
Hi !
Do you know if other models of RS-485 transceivers than SN65HVD1786 exist on PSpice for TI (for example SN65HVD1787).
Thank you !
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Hi !
Do you know if other models of RS-485 transceivers than SN65HVD1786 exist on PSpice for TI (for example SN65HVD1787).
Thank you !
Hi Louca,
We only have a spice model for the SN65HVD1786 available from this device family.
Do you have any specific questions about the operation of the part? I am asking because the models that we do have tend to be less than ideal anyway so generally anything they can answer can usually be analytically approximated because the models are just doing simplified approximations of how the silicon actually works.
Best,
Parker Dodson
Hi Parker !
I was wondering if for this model of SN65HVD1786 you put a frequency operating limit at 1 MHz as it's said in the datasheet.
Because I need to do some simulations at 10 MHz and more, and I don't know if I can trust the results at this frequency.
Thank you for your answer !
Hi Louca,
So there isn't a strict "max frequency" per se on this model - but it mimics its propagation delay and rise/fall times with RC circuits so pushing past 1Mbps may get you strange results - however the 1786 model makes its dynamic characteristics much better than what you would see in reality.
Are you planning on using the SN65HVD1787? (since it has a higher listed data-rate) - and is there any specific spec that you are more concerned about? I am asking because we don't use this type of PSpice model for RS-485 anymore - while we haven't officially released any newer models they are less idealized then the ones that we have now and may be a little more helpful. While I can't get full model - depending on what specs you are most concerned about I can create a simplified model that may prove useful - because unfortunately the 1786 model is not a great stand-in for the 1787 model. I will say the simplified model will give you a room temperature style typical performance - if you need to stress testing our suggestion is actual hardware testing because our spice models that we can create for RS-485 are not great for max/min edge case testing.
Please let me know!
Best,
Parker Dodson
Hi Parker,
I would indeed like to do some test with a 1787 model between 1MHz and 10MHz if it's possible, just to see if I filter correctly. The fact that the model fits for typical conditions doesn't bother me, I'll do stress testing with the hardware afterwards.
Hi Louca,
Alright that makes sense - So what I can do is create a pretty straightforward model - it will take a few days, so let me circle back at the end of the week and I should have something for you.
Best,
Parker Dodson
Hi Louca,
So I have two models for you - there was some issues with integrating them both together - so depending on what you are exactly looking at will determine the model.
A few notes overall for the models:
a) They are lib files
b) They don't model ICC
c) Enable/disable timing is not modeled correctly
d) VCC is expected to be 5V
e) Input impedance for differential driver is static at 96k - in reality it varies and typically is higher than 96k
f) This device doesn't capture the fault protection behavior of the device and its common mode may not stretch the entire range as described in datasheet.
1. Typical spec model - it includes the entire part - but the receiver pathway isn't acting normal - so I would just tie both DE and /RE to VCC for testing - this model will capture the electrical and timing specs of the TX path for direct signaling - the simple models enable timing is not accurate so I wouldn't test this model using that.
SN65HVD1786_typicalSpecModel.lib
2. The RX pathway - so this includes the A, B, VCC, GND, and a DNRE_ST input.
A and B are differential receiver inputs - the input impedance is static and set to 96k - in reality this will vary a bit.
VCC and GND are power supply (model supports 5V only - since it is typical use case and ICC is not correctly modeled)
R pin - captures propagation delay and electrical specs - may be a little slow on the rise/fall time of the signal as this models architecture does have some difficulty getting really fast rise/fall times - but it should be pretty close.
This is the same model that is included in the top model - I just separated it out and they should be isolated pathways in 1st model but I was having trouble getting it to work properly unless I isolated it.
Please let me know if you have any other questions and I will see what I can do!
Best,
Parker Dodson