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DP83640: How to set up PTP_INTCTL?

Part Number: DP83640

Hello there

I'd like to configure the PHY to output whenever a PTP RX Timestamp is ready. I already enabled interrupts and the PTP interrupt in the MICR register (INTEN & PTP_INT_SEL) and enabled interrupts on RX timestamps in the PTP_STS register (RXTS_IE) and a couple of other settings like UDP- and L2-based PTP frame timestamping

I tested the interrupt by first enabling "INT_OE" in the MICR register and I was able to successfully see the LOW signal on the PWRDWN pin when the interrupt triggered, now I want to output a signal through the PHY's GPIO2 pin instead of the PWRDWN pin, however, setting PTP_INTCTL to the value 2 does not output any signal when the interrupt hits. 

I verified the correct connection between GPIO2 and my MCU by enabling RX-SFD GPIO output through the PTP_SFDCFG register and that did work, so it's not an electrical connection problem. But obviously I can't use this functionality as that would trigger the output on any kind of ethernet frame.

Can you describe what settings are needed in order to output the PTP RX interrupts on GPIO2?

Thank you in advance.

  • Hi Patrick,

    Could you share a register dump including all of the PTP/interrupt registers you have modified?

    I'm looking into the exact settings required for this, and would like to look over the configuration you have set as well.

    Thank you,

    Evan

  • Hi Evan,

    here's the log output of my ESP32 program:

    I (549) dp83640: Resetting PTP
    I (549) dp83640: Getting PTP_CTL register
    I (550) dp83640: PTP_CTL Register Value: 0x0004
    I (553) dp83640: Setting PTP_INTCTL register
    I (556) dp83640: Getting PTP_INTCTL register
    I (559) dp83640: PTP_INTCTL Register Value: 0x0002
    I (562) dp83640: Setting micr register
    I (565) dp83640: Getting micr register
    I (568) dp83640: MICR Register Value: 0x000A
    I (571) dp83640: Setting misr register
    I (573) dp83640: Getting misr register
    I (576) dp83640: MISR Register Value: 0x0008
    I (579) dp83640: Setting PTP_STS register
    I (582) dp83640: (ptp_sts.val == 0x0004)
    I (584) dp83640: Getting ptp_sts register
    I (587) dp83640: PTP_STS Register Value: 0x0004
    I (590) dp83640: Setting PTP_RXCFG0 register
    I (593) dp83640: Getting PTP_RXCFG0 register
    I (596) dp83640: PTP_RXCFG0 Register Value: 0x00A1
    I (600) dp83640: Getting PTP_RXCFG3 register
    I (603) dp83640: PTP_RXCFG3 Register Value: 0x0C00
    I (607) dp83640: Setting DP83640 PTP Interrupt GPIO to GPIO2
    I (610) dp83640: Getting PTP_INTCTL register
    I (613) dp83640: PTP_INTCTL Register Value: 0x0002

    EDIT: These are currently all registers that I'm modifying, I'll get a full register dump soon

  • Here's a quick register dump after my whole setup stuff (I skipped reserved registers):

    I (646) dp83640: Register 0x00 Value: 0x3100
    I (649) dp83640: Register 0x01 Value: 0x78C9
    I (652) dp83640: Register 0x02 Value: 0x2000
    I (655) dp83640: Register 0x03 Value: 0x5CE1
    I (658) dp83640: Register 0x04 Value: 0x01E1
    I (661) dp83640: Register 0x05 Value: 0x0000
    I (664) dp83640: Register 0x06 Value: 0x0004
    I (667) dp83640: Register 0x07 Value: 0x2001
    I (670) dp83640: Register 0x10 Value: 0x0000
    I (673) dp83640: Register 0x11 Value: 0x000A
    I (676) dp83640: Register 0x12 Value: 0x0008
    I (679) dp83640: Register 0x13 Value: 0x0006
    I (682) dp83640: Register 0x14 (Page 0) Value: 0x0000
    I (685) dp83640: Register 0x15 (Page 0) Value: 0x0000
    I (688) dp83640: Register 0x16 (Page 0) Value: 0x0100
    I (692) dp83640: Register 0x17 (Page 0) Value: 0x0021
    I (695) dp83640: Register 0x18 (Page 0) Value: 0x0000
    I (699) dp83640: Register 0x19 (Page 0) Value: 0x8021
    I (702) dp83640: Register 0x1A (Page 0) Value: 0x0904
    I (706) dp83640: Register 0x1B (Page 0) Value: 0x0000
    I (709) dp83640: Register 0x1C (Page 0) Value: 0x0000
    I (713) dp83640: Register 0x1D (Page 0) Value: 0x6011
    I (716) dp83640: Register 0x1F (Page 0) Value: 0x0000
    I (719) dp83640: Register 0x1E (Page 1) Value: 0x8000
    I (723) dp83640: Register 0x14 (Page 2) Value: 0x00FF
    I (726) dp83640: Register 0x15 (Page 2) Value: 0x0000
    I (730) dp83640: Register 0x16 (Page 2) Value: 0x0000
    I (733) dp83640: Register 0x17 (Page 2) Value: 0x0000
    I (737) dp83640: Register 0x18 (Page 2) Value: 0x0000
    I (740) dp83640: Register 0x19 (Page 2) Value: 0x0000
    I (743) dp83640: Register 0x1A (Page 2) Value: 0x0000
    I (747) dp83640: Register 0x1B (Page 2) Value: 0x0000
    I (750) dp83640: Register 0x1D (Page 2) Value: 0x0000
    I (754) dp83640: Register 0x1E (Page 2) Value: 0x0080
    I (757) dp83640: Register 0x1F (Page 2) Value: 0x0000
    I (761) dp83640: Register 0x14 (Page 4) Value: 0x0004
    I (764) dp83640: Register 0x15 (Page 4) Value: 0x0000
    I (768) dp83640: Register 0x16 (Page 4) Value: 0x0004
    I (771) dp83640: Register 0x17 (Page 4) Value: 0x0000
    I (774) dp83640: Register 0x18 (Page 4) Value: 0x0000
    I (778) dp83640: Register 0x19 (Page 4) Value: 0x0000
    I (781) dp83640: Register 0x1A (Page 4) Value: 0xFFEF
    I (785) dp83640: Register 0x1B (Page 4) Value: 0xFFF7
    I (788) dp83640: Register 0x1C (Page 4) Value: 0x0000
    I (792) dp83640: Register 0x1D (Page 4) Value: 0x0000
    I (795) dp83640: Register 0x1E (Page 4) Value: 0x0000
    I (798) dp83640: Register 0x1F (Page 4) Value: 0x0000
    I (802) dp83640: Register 0x14 (Page 5) Value: 0x0002
    I (805) dp83640: Register 0x15 (Page 5) Value: 0x000F
    I (809) dp83640: Register 0x16 (Page 5) Value: 0x0000
    I (812) dp83640: Register 0x17 (Page 5) Value: 0x0000
    I (816) dp83640: Register 0x18 (Page 5) Value: 0x0000
    I (819) dp83640: Register 0x19 (Page 5) Value: 0x00A1
    I (823) dp83640: Register 0x1A (Page 5) Value: 0x0000
    I (826) dp83640: Register 0x1B (Page 5) Value: 0x0000
    I (829) dp83640: Register 0x1C (Page 5) Value: 0x0C00
    I (833) dp83640: Register 0x1D (Page 5) Value: 0x0000
    I (836) dp83640: Register 0x1E (Page 5) Value: 0x0000
    I (840) dp83640: Register 0x1F (Page 5) Value: 0x0000
    I (843) dp83640: Register 0x14 (Page 6) Value: 0x800A
    I (847) dp83640: Register 0x15 (Page 6) Value: 0x0000
    I (850) dp83640: Register 0x16 (Page 6) Value: 0x0000
    I (853) dp83640: Register 0x17 (Page 6) Value: 0x0000
    I (857) dp83640: Register 0x18 (Page 6) Value: 0x0000
    I (860) dp83640: Register 0x19 (Page 6) Value: 0x0000
    I (864) dp83640: Register 0x1A (Page 6) Value: 0x0002
    I (867) dp83640: Register 0x1B (Page 6) Value: 0x0008
    I (871) dp83640: Register 0x1C (Page 6) Value: 0xF788
    I (874) dp83640: Register 0x1D (Page 6) Value: 0x0000
    I (878) dp83640: Register 0x1E (Page 6) Value: 0x0651
    I (881) dp83640: Register 0x1F (Page 6) Value: 0x0000
    I (884) dp83640: ----------------- REGISTER DUMP END ---------------

  • I solved it, turns out that the PTP_INTCTL uses the pin active-low in open-drain, while for example SFD output uses push-pull. This behaviour is as far as I can see not described in the datasheet. I randomly found this information in another PDF contained in the following example code:

    https://www.ti.com/tool/DP83640SW-LIB

    Too bad that this isn't described in the datasheet as it definitely should've been mentioned..

  • Hi Patrick,

    I'm glad you found the issue. Thank you for the feedback on the ambiguity of the internal scheme of the SFD vs interrupt pins, I will see if we can clarify this in the next datasheet revision.

    Best regards,

    Evan