Other Parts Discussed in Thread: TCA9800, , TXS0102
Hello,
My understanding of the rise time accelerator (RTA) is that it drives the output high for ~50nS when it senses that the output has risen to about 30% VCC (as a result of the pull ups).
During periods where control of the SDA net is being transferred from one device to another (e.g. an ACK) I do not believe that we can ensure that the slave ACKs within 50nS of the master releasing the bus. i.e. I think it is viable that the master releases the bus, the RTA triggers and then whilst the RTA is active the slave drives the bus low to communicate an ACK. There is nothing we can do to stop this.
What is the implication of this? Is it simply that VCC is shorted to ground for a short while through the 50R(min) RTA resistor, and as long as VCC has sufficient capacitance (e.g.10x the energy in the pulse -> 20nF) then all will be ok? I note that at 3v3 the output current through the 50R will be greater than the abs max current clamp rating of the pin - is this ok also?
Thanks in advance
Dave
