DS90UB954-Q1: CSI-2 Synchronous Back Channel

Hello,

Thank you for your question. The DS90UB954 and DS90UB933 are only compatible if the DS90UB954 is operating in RAW mode. Please update your system so that the DS90UB954 is set to one of the RAW functional modes instead of CSI2 Synchronous. These errors are a result of the mismatched functional modes.

Hello Darrah,

Yes from my hardware strap pin connection was set to CSI2 Synchronous Back Channel mode, but then I had using software to overwrite the mode via register 0x6D. I had wrote value 0x7F to register 0x6D. But somehow, it still getting  BCC_CRC_ERROR and BCC_SEQ_ERROR. Any idea? I did set 0x70 to value 0x1F for RAW10_ID register.

Hello,

Are the errors consistent during operation or only on the initial register read? These errors will clear on read of register 0x4D, so if subsequent reads do not return errors that means the errors are only being logged during the incorrect mode at initialization.

Hello,

     For the subsequence read it was OK. And then I get error on address 0x4E, BUFFER_ERROR. From design document explain Buffer Error: Buffer errors refer to the overflow condition that has occurred on the packet buffer FIFO. What will cause the overflow condition?

    For CSI_RX_STS address 0x7A, I am getting value 0x00. It should indicate that CSI RX pass.

Hello,

The devices will lock and begin transmitting using the modes that are strapped at the mode pins. Since there is an incompatible mode selection, many errors will be generated until the mode is overwritten via registers. This is why you see the errors on the first read of the registers. The buffer error is an error that occurs when the received data surpasses the space available in the device's buffer. Similar to the other errors discussed, the errors will be logged while the device is operating in the improper mode as the device can not support that configuration, once the mode is overridden the already logged errors will remain in the registers until read. As long as all subsequent register reads do not return an error, the system is operating properly.

Hello,

     For subsequence read I am still getting BUFFER_ERROR at 954.

    My 933 configure Device Functional Mode as running at operation with external oscillator (42Mhz) as Reference Clock. Does the mode at serializer compatible to deserializer setup. Any hint to check whether what will cause BUFFER_ERROR  there?

Hello,

What PCLK is being used by the imager in your system? Is only one 933 being used or is there a second serializer on the 954's second RX port? A buffer error indicates that the data received by the 954 is exceeding it's bandwidth (data received faster than the device can output).

Hi, 

    From calculation the PCLK for 933 should be XLCKIN * RATIO, which is 42MHz * 2 = 84MHz. Only PORT0 being active on deserializer there. 

    Some useful register information that read from 954 that might help to debug

    So, does my configuration lack of something that cause BUFFER_ERROR there?

Hello,

What resolution and frame rate is being used? Based on your register 0x70 = 0x1F setting, the data type is yuv422 10-bit, is that correct? Have you made any other register configurations on the 933 or 954? Can you update register 0x1F = 0x0, and see if that has any impact?

Hello, 

    Resolution 1340x1020, 30 frame rate. Data format YUV22-10bit. Updated 0x1F to 0x00 no impact.

For Deseserializer

0x4C, 0x01

0x58, 0xD8

0x6D, 0x7F

0x0C, 0x81

0x70, 0x1F

0xBC, 0x00

0x20, 0x20

0x0F, 0x00

0x10, 0x13

0x14, 0x13

0x33, 0x01

0x5C, 0xBA

0x5D, 0xBC

Hello,

Are you seeing any distortion of the video data being output by the 954? Are any other errors being seen? How many CSI lanes are connected on the hardware setup? Are you using custom boards or EVMs?

One note on the deserializer configuration,  targetID0 is programmed in register 0x5D but the corresponding targetAlias0 is not programmed in register 0x65. Additionally, the frame valid minimum time is being set to 0 in registers 0xBC. Why is the minimum time being set to 0, how was this value determined?