DP83867CR: High peaks value ok circuit

Hi Mart,

Have you referenced our DP83867 TDR app note (SNLA344)? This may have some information of how to properly use the feature which you can compare against your methodology.

Sincerely,

Gerome

Hi Gerome,

Thanks for your response.

Yes, I used the DP83867 app note to make my driver implementation. Everything works (Short Circuit Open circuit) but the OK status is a bit unpredictable, when i run multiple test sometimes it says OK and the next day with the same setup the status gives Open circuit. Even restarting the setup can give change the result. I already tried using different cables types and lengths but it didn't change the behavior.

Kind regards,

Mart

Hi Mart,

Is this behavior happening across multiple of your boards using the same cable?

If you were to use our EVM as an apple-to-apples comparison to what we have in our lab, what do you see?

Sincerely,

Gerome

Hi Gerome,

I currently dont have access to the EVM. I am using the Conga-SA7 SOM with the Conga Seval carrierboard, the SOM has two DP83867 PHY's. On both ports i get the same behavior. So sometimes giving OK signal and some times giving Open circuit. The only difference in the data is that the peak value read from the register is bigger then the threshold when it gives open circuit and smaller or equal when it gives OK. The calculated location of the fault when it gives open circuit is 0.

Kind regards,

Mart

Hi Mart,

I would want to look at recreating this setup in lab. Would you please disclose the type and length of cable being used? Perhaps in parallel you can look to conduct this type of experiment with EVM in your setup to give us similar setups to debug more efficiently.

Sincerely,

Gerome

Hi Gerome,

Thanks for your response. I used de following cables:

• 2m CAT5 UTP
• 10m CAT5 FTP
• 15m CAT5 UTP

I will try to get an EVM to conduct the same experiment.

Kind regards,

Mart

Hi Mart,

I came across this E2E post regarding TDR with link partner. Is link partner active when TDR is being conducted? 

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/624167/dp83867ir-dp83867-tdr-enable

Sincerely,

Gerome

Hi Gerome,

For the test i am using a ethernet switch that is turned off so there is no active link partner while running the test.

Kind regards,
Mart

Hi Mart,

Can you please share the TDR related register dump:

0x190
0x191
0x192
0x19a
0x19b
0x19c
0x1a5

Please note these are extended registers and thus need appropriate extended access to get proper data.

Please confirm you are conducting the TDR mechanism appropriately when conducting this experiment and providing dumps:

Reg 0x189 = 0x0

Reg 0x186 = 0x294A

Reg 0x187 = 0xA9B

Reg 0x1E = 0x3

Sincerely,

Gerome

Hi Gerome,

Here are the register dumps, I used a 10/100 and 1000 switch that both were disconnected from power. For the test is used a CAT 5 2m cable. I tested it on both ports on my conga-seval carrier board. Only on eno1 the results reported OK with the OK circuit.

eno1:
    OPEN circuit:
    * Reg 0x190 = 0x13
    * Reg 0x191 = 0x00
    * Reg 0x192 = 0x1200
    * Reg 0x19A = 0x3E
    * Reg 0x19B = 0x00
    * Reg 0x1A5 = 0x00
    
    1000:
        OK circuit:
        * Reg 0x190 = 0x13
        * Reg 0x191 = 0x00
        * Reg 0x192 = 0x1200
        * Reg 0x19A = 0x50
        * Reg 0x19B = 0x00
        * Reg 0x1A5 = 0x00
    10/100:
        OK circuit:
        * Reg 0x190 = 0x00
        * Reg 0x191 = 0x00
        * Reg 0x192 = 0x1100
        * Reg 0x19A = 0x00
        * Reg 0x19B = 0x00
        * Reg 0x1A5 = 0x20
eno2:
    OPEN circuit:
    * Reg 0x190 = 0x12
    * Reg 0x191 = 0x00
    * Reg 0x192 = 0x1200
    * Reg 0x19A = 0x7F
    * Reg 0x19B = 0x00
    * Reg 0x1A5 = 0x00
    
    1000:
        OK circuit:
        * Reg 0x190 = 0x13
        * Reg 0x191 = 0x00
        * Reg 0x192 = 0x1300
        * Reg 0x19A = 0x5E
        * Reg 0x19B = 0x00
        * Reg 0x1A5 = 0x00
    10/100:
        OK circuit:
        * Reg 0x190 = 0x10
        * Reg 0x191 = 0x00
        * Reg 0x192 = 0x1000
        * Reg 0x19A = 0x2A
        * Reg 0x19B = 0x00
        * Reg 0x1A5 = 0x21

Kind regards,

Mart

Hi Mart,

My team was able to process the results and got the following findings in order:

1) Open Fault, 2.31m

2) Open Fault, 2.31m

3) No fault

4) Open Fault, 1.54m

5) Open Fault, 2.31m

6) No fault

Does this match your findings? Can you also clarify what "OK circuit" means?

Sincerely,

Gerome