Other Parts Discussed in Thread: DS16EV5110A, DS16EV5110
Hi
Could you help suggest a suitable product for DVI-I Dual Link IC?
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Hi
Could you help suggest a suitable product for DVI-I Dual Link IC?
Hi,
We do not have a DVI Dual Link in our product portfolio.
Thanks
David
Hi Nasser
Could you help with suggested designs
The customer's current design is to directly use the CPU's native TCSS signal to the DVI IC. TCSS only has 1 pair of CLK + 4 pairs of RXTX, but the public reference line requires 5 pairs of signal lines + CLK
DS16EV51-AEVKD DVI Extender Demo Kit for Dual or Single Link DVI Cables (ti.com)
Hi Gareth,
From device point of view, D4 and D5 can be utilized if needed. Customer application does not require using D4 & D5. You can also check with the customer on their requirements. Typically using D4 & D5 enables higher image resolution.
Regards, Nasser
Hi Nasser
If you want to use 2048*1536p, you must use D3/D4/D5 The signal used is that the CPU's native TCP signal only has one set of clk + 3 sets of DP/DN, which leaves three sets missing. So I would like to ask if you need another set of TCP for D3/D4/D5 and is it provided? how to do it
1. How to design D3/D4/D5? The requirement is to reach the highest specification of dual link.
2. How to design HPD
Hi Gareth,
1). To support D3, D4, and D5 then we need to use the second DS16EV5110 device. First part would support D0, D1, and D2.
2). DS16EV45110 is an equalizer only. To support HPD, external circuitry should be used - not related to DS16EV5110. Online, i was able to find intel application not discussing this:
https://www.intel.com/content/www/us/en/docs/programmable/683677/current/hot-plug-detect-hpd.html
Regards, Nasser
Hi Nasser
Thank you for your comment
No more questions about HPD
Another question is: Where do the D3, D4 and D5 signal sources come from? (The left picture below shows the available signal sources, the red ones on the right are D3, D4, and D5)
Hi Nasser
1) The customer's Video source is the TCP1 group. There are four pairs of TXRX, namely D0, D1, D2 and CLK.
That needs to achieve the highest specifications, so D3, D4 and D5 are needed, so they want to know whether D3, D4 and D5 need to be
pulled from the second set of TCP, or how to do it?
2). What is connected to the reference circuit INPUT?