SN65HVS882: Internal pull-up/downs and is SOP tri-state?

Louis Colbach

Intellectual 1310 points

Part Number: SN65HVS882

Hi,

Two questions regarding the SN65HVS882:

Do the DB0, DB1, SIP, LD#, CE# and CLK pins have internal pull-ups to the 5V supply or pull-downs to GND? If so, what would be their value?
Is SOP tri-state or do you need an external buffer for that functionality if you want to operate other additional devices on the same SPI bus?

Thanks.

Best regards,
Louis

over 1 year ago

+1 Rami Mooti1 over 1 year ago

TI__Mastermind 35528 points

Hey Louis,

1. No internal pulldowns in this device besides on the TOK pin

2. SOP isn't tri-state so you'll need a tri-state buffer here. After the 8th rising edge of the clock the status of IP0 is clocked into the input register and SOP will assume the state of the SIP pin. So it will either be high or low.

Thanks,
Rami

0 Louis Colbach over 1 year ago in reply to Rami Mooti1

TI__Intellectual 1310 points

Hi Rami,

Would it be ok for industrial applications to leave pins DB0, DB1 and SIP open/floating, or should they ideally have pull-up resistors?

Thanks.

Best regards,
Louis

0 Alex Vish over 1 year ago in reply to Louis Colbach

TI__Genius 10552 points

Hi Louis,

Please allow until tomorrow for a response due to local storms affective many TI employees.

Regards,

Alex

0 Rami Mooti1 over 1 year ago in reply to Louis Colbach

TI__Mastermind 35528 points

Hey Louis,

You can leave the DBx pins open. It would just make the debounce timer on the IP0-IP7 3ms. If you're okay with that debounce time, then it won't be a problem.

You can also technically leave the SIP pin floating but I'd recommend holding it high or low just so you aren't seeing random data when it's being pushed to SOP.

Thanks,
Rami

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SN65HVS882: Internal pull-up/downs and is SOP tri-state?