Tool/software:
Hi,
The customer uses this material for design, but the USB signal is not enhanced. Please help to review the principle design. Is there any problem?
The 3.0 chip is not welded.
Thank you~
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Tool/software:
Hi,
The customer uses this material for design, but the USB signal is not enhanced. Please help to review the principle design. Is there any problem?
The 3.0 chip is not welded.
Thank you~
Hi Rhea,
Looking at the layout, I don't see any notable issues there.
One thing I noticed on the schematic is that the 3.3V rail powering the TUSB211 is coming from VBUS being regulated down to 3.3V. What could be happening is that packets are being sent through the redriver before the redriver is enabled, which in turn causes the redriver not to detect said packets. Ideally, the redriver should be enabled before the packets are sent, that way the redriver can detect the HS handshake.
Additionally, please ensure you are following the test procedure listed in section 8.2.2.1.
Thanks,
Ryan
Hi Ryan,
Is the customer power supply late? How can I solve this problem?
Describe the test situation on the customer side: Use the test software under the win7 system, until the voltage is stable and then enter the test mode, check the eye map test waveform through the high-speed oscilloscope, whether to add the chip, no significant changes can be seen in the waveform (including 1.0 and 2.0), in multiple tests, failed to test the VREG (pin11) pin output 1.8vLDO voltage output.
Is there a better recommendation for usb1.0 and 1.1 signal enhancement chips?
Thanks~
Is the customer power supply late? How can I solve this problem?
You can check this by monitoring the 3.3V rail attached to the VCC pin of the TUSB211 and the DP/DM lanes of the USB2 data lanes, and making sure VCC is up to 3.3V and stable before any data is sent through. Our USB2 redriver needs to be powered on before any data is sent through the data lanes, that way our redriver can see the HS handshake take place, and enable HS equalization.
If the redriver is being enabled after data is being sent, it may not be turning on or boosting. The main recommendations we have would be to somehow delay send data to ensure that the redriver is enabled before this is done, or attaching a separate 3.3V rail, one not attached to VBUS, and using that to ensure it is enabled ahead of time.
in multiple tests, failed to test the VREG (pin11) pin output 1.8vLDO voltage output.
As in VREG was not captured, or was not having any output? If the redriver is enabled, this should be outputting 1.8V.
Is there a better recommendation for usb1.0 and 1.1 signal enhancement chips?
For LS/FS, our only recommendation we have are our FS hubs.
Please let me know if you have any other questions.
Thanks,
Ryan