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TCAN4550-Q1: CAN transceiver send/recewive message

Leon Von
Prodigy 40 points

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

Tool/software:

Hello,

I completed the TCAN4550 initialization refer to  the TCAN demo, but when I called the function 

TCAN4x5x_MCAN_ClearInterruptsAll     // Resets all MCAN interrupts (does NOT include any SPIERR interrupts).

then I call TCAN4x5x_MCAN_WriteTXBuffer to write to the TxBuffer,  I received a CANERR from TCAN with SPI communication.

the Log as  follows (W and R are synchronous) :

ClearInterruptsAll
W: 0x61 0x10 0x50 0x01 0xff 0xff 0xff 0xff
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
W: 0x61 0x81 0x74 0x04
R: 0xa0 0x00 0x00 0x00

Regards,

Leon

  • 0
    TI__Mastermind 35410 points

    Hello Leon,

    The Global Status Byte returned on your SPI write is 0xA0 which shows the CAN Error (CANERR) bit is getting set.  This is the Logical OR of the CAN Silent (CANSLNT) and the CAN Stuck Dominant (CANDOM) bits in the Interrupts register 0x0820.  You should read this register to determine which bit is responsible for setting the CANERR flag.

    Note that the CANSLNT bit will be set if there is no CAN activity (recessive to dominant transitions) for longer than approximately 1 second.

    I'm not sure if you are just providing me some of the SPI R/W information to ask about the CANERR, but the second write you have provide shows a Length field of 4 words, but there is not any data.  For a Length field of 4, you should have an additional 16 bytes of data in the write and read.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 40 points

    Hi Jonathan

    I`m sorry, I didn't express myself fully. After  called  the function Init_CAN, I followed the TCAN demo as shown in the figure: 

    and the register 0x0820 show data (R: 0x00 0x00 0x04 0xa0), It is CANSLNT. 

    ClearInterruptsAll
    W: 0x61 0x10 0x50 0x01 0xff 0xff 0xff 0xff
    R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
    W: 0x61 0x81 0x74 0x04
    R: 0xa0 0x00 0x00 0x00
    W: 0x05 0x10 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x38 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x88 0x77 0x66 0x55
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x41 0x08 0x20 0x01
    R: 0xa0 0x00 0x00 0x00
    R: 0x00 0x00 0x04 0xa0
    W: 0x61 0x81 0xbc 0x06
    R: 0xa0 0x00 0x00 0x00
    W: 0x04 0x8c 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x3a 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x44 0x33 0x22 0x11
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x00 0x01 0x23
    R: 0x00 0x00 0x00 0x00
    W: 0x00 0x00 0x00 0x3a
    R: 0x00 0x00 0x00 0x00
    W: 0x61 0x10 0xd0 0x01 0x00 0x00 0x00 0x02
    R: 0xa0 0x00 0x00 0x00 0x00 0x00 0x00 0x00
    W: 0x61 0x10 0xd0 0x01 0x00 0x00 0x00 0x01
    R: 0xa0 0x00 0x00 0x00 0x00 0x00 0x00 0x00

    and CANOE receive frame as follow:

  • 0 in reply to Leon Von
    Prodigy 40 points

    and the register 0x0830 showed CANSLNT is disabled when I writed Tx Buffer.

    W: 0x41 0x08 0x30 0x01
    R: 0xa0 0x00 0x00 0x00

  • 0 in reply to Leon Von
    TI__Mastermind 35410 points

    Hi Leon,

    The CANSLNT bit will get set if there is no CAN activity within approximately 1 second which may be an indication of an error such as broken or cut wires, etc.  Once activity resumes, the bit should be cleared.

    The Stuff error could come from a difference in the bit timing configuration between the TCAN4550 and the CANoe settings.  Please verify that the settings of the TCAN4550 match those of the CANoe configuration.  Also, make sure there is not some other physical issue with the bus and that there are termination resistors at both ends.  The bus should have a total of 60ohms of resistance between CANH and CANL.

    If the bit timing and sampling position settings are different, or there is some sort of issue with the CAN bus degrading the signal integrity, then there could be sampling issues.

    But a Stuff error is when 6 or more bits are detected of the same value which is not allowed per the protocol.  The Data array in the code should prevent this, or the device should automatically insert a stuff bit if needed.  So if the device is working correctly, and the bit timings are ok, then an additional bit should be inserted to prevent this error if the data had 6 or more consecutive 1's or 0's.

    Can you capture the CANH and CANL waveforms so we can see what is being produced by the device when you transmit a message?

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 40 points

    Hi Jonathan

    I used an oscilloscope to measure the voltage range of CANL and CANH when I transmited a message, the CANL and CANH are 2.0- 2.8v.

    I writed Tx Buffer as follow:

    I capture the CANH and CANL waveforms by Logic analysis. But the data are very strange. It's almost always 1

    The CAN frame decoder:

    Fullscreen decoder--240605-163127.txt Download 
    Id,Time[ns],CAN-FD: Fields
1,49999920.00,Start of frame
2,50001920.00,Identifier: 0 (0x0)
3,50023920.00,Remote transmission request: data frame
4,50025920.00,Identifier extension bit: standard frame
5,50027920.00,Flexible data format: 0
6,50029920.00,Data length code: 0
7,50037920.00,CRC-15 sequence: 0x0000
8,50067920.00,CRC delimiter: 0
9,50069920.00,ACK slot: ACK
10,50071920.00,ACK delimiter: 0
11,50073920.00,End of frame
12,1231798240.00,Start of frame
13,1231800240.00,Identifier: 2047 (0x7ff)
14,1231822240.00,Substitute remote request: 1
15,1231824240.00,Identifier extension bit: extended frame
16,1231826240.00,Extended Identifier: 262143 (0x3ffff)
17,1231826240.00,Full Identifier: 536870911 (0x1fffffff)
18,1231862240.00,Remote requset substituion: 1
19,1231864240.00,Flexible data format: 1
20,1231866240.00,Reserved bit 0: 1
21,1231869440.00,Bit rate switch: 1
22,1231870320.00,Error state indicator: 1
23,1231870840.00,Data length code: 15
24,1231872840.00,Data byte 0: 0xff
25,1231876840.00,Data byte 1: 0xff
26,1231880840.00,Data byte 2: 0xff
27,1231884840.00,Data byte 3: 0xff
28,1231888840.00,Data byte 4: 0xff
29,1231892840.00,Data byte 5: 0xff
30,1231896840.00,Data byte 6: 0xff
31,1231900840.00,Data byte 7: 0xff
32,1231904840.00,Data byte 8: 0xff
33,1231908840.00,Data byte 9: 0xff
34,1231912840.00,Data byte 10: 0xff
35,1231916840.00,Data byte 11: 0xff
36,1231920840.00,Data byte 12: 0xff
37,1231924840.00,Data byte 13: 0xff
38,1231928840.00,Data byte 14: 0xff
39,1231932840.00,Data byte 15: 0xff
40,1231936840.00,Data byte 16: 0xff
41,1231940840.00,Data byte 17: 0xff
42,1231944840.00,Data byte 18: 0xff
43,1231948840.00,Data byte 19: 0xff
44,1231952840.00,Data byte 20: 0xff
45,1231956840.00,Data byte 21: 0xff
46,1231960840.00,Data byte 22: 0xff
47,1231964840.00,Data byte 23: 0xff
48,1231968840.00,Data byte 24: 0xff
49,1231972840.00,Data byte 25: 0xff
50,1231976840.00,Data byte 26: 0xff
51,1231980840.00,Data byte 27: 0xff
52,1231984840.00,Data byte 28: 0xff
53,1231988840.00,Data byte 29: 0xff
54,1231992840.00,Data byte 30: 0xff
55,1231996840.00,Data byte 31: 0xff
56,1232000840.00,Data byte 32: 0xff
57,1232004840.00,Data byte 33: 0xff
58,1232008840.00,Data byte 34: 0xff
59,1232012840.00,Data byte 35: 0xff
60,1232016840.00,Data byte 36: 0xff
61,1232020840.00,Data byte 37: 0xff
62,1232024840.00,Data byte 38: 0xff
63,1232028840.00,Data byte 39: 0xff
64,1232032840.00,Data byte 40: 0xff
65,1232036840.00,Data byte 41: 0xff
66,1232040840.00,Data byte 42: 0xff
67,1232044840.00,Data byte 43: 0xff
68,1232048840.00,Data byte 44: 0xff
69,1232052840.00,Data byte 45: 0xff
70,1232056840.00,Data byte 46: 0xff
71,1232060840.00,Data byte 47: 0xff
72,1232064840.00,Data byte 48: 0xff
73,1232068840.00,Data byte 49: 0xff
74,1232072840.00,Data byte 50: 0xff
75,1232076840.00,Data byte 51: 0xff
76,1232080840.00,Data byte 52: 0xff
77,1232084840.00,Data byte 53: 0xff
78,1232088840.00,Data byte 54: 0xff
79,1232092840.00,Data byte 55: 0xff
80,1232096840.00,Data byte 56: 0xff
81,1232100840.00,Data byte 57: 0xff
82,1232104840.00,Data byte 58: 0xff
83,1232108840.00,Data byte 59: 0xff
84,1232112840.00,Data byte 60: 0xff
85,1232116840.00,Data byte 61: 0xff
86,1232120840.00,Data byte 62: 0xff
87,1232124840.00,Data byte 63: 0xff
88,1232129320.00,Stuff count: 111
89,1232130840.00,Parity: 1
90,1232131320.00,CRC-21 sequence: 0x1fffff
91,1232144840.00,CRC delimiter: 1
92,1232971840.00,ACK slot: NACK
93,1232973840.00,ACK delimiter: 1
94,1232975840.00,End of frame
95,1233089640.00,Start of frame
96,1233091640.00,Identifier: 0 (0x0)
97,1233113640.00,Remote transmission request: data frame
98,1233115640.00,Identifier extension bit: standard frame
99,1233117640.00,Flexible data format: 0
100,1233119640.00,Data length code: 3
101,1233129640.00,Data byte 0: 0xff
102,1233145640.00,Data byte 1: 0xff
103,1233161640.00,Data byte 2: 0xff
104,1233179640.00,CRC-15 sequence: 0x7fff
105,1233209640.00,CRC delimiter: 1
106,1233211640.00,ACK slot: NACK
107,1233213640.00,ACK delimiter: 1
108,1233215640.00,End of frame
109,1233277640.00,Start of frame
110,1233279640.00,Identifier: 2047 (0x7ff)
111,1233301640.00,Substitute remote request: 1
112,1233303640.00,Identifier extension bit: extended frame
113,1233305640.00,Extended Identifier: 262143 (0x3ffff)
114,1233305640.00,Full Identifier: 536870911 (0x1fffffff)
115,1233343640.00,Remote requset substituion: 1
116,1233345640.00,Flexible data format: 1
117,1233347640.00,Reserved bit 0: 1
118,1233350840.00,Bit rate switch: 1
119,1233351720.00,Error state indicator: 1
120,1233352240.00,Data length code: 15
121,1233354240.00,Data byte 0: 0xff
122,1233358240.00,Data byte 1: 0xff
123,1233362240.00,Data byte 2: 0xff
124,1233366240.00,Data byte 3: 0xff
125,1233370240.00,Data byte 4: 0xff
126,1233374240.00,Data byte 5: 0xff
127,1233378240.00,Data byte 6: 0xfc
128,1233383120.00,Data byte 7: 0x7f
129,1233387120.00,Data byte 8: 0xff
130,1233391120.00,Data byte 9: 0xff
131,1233395120.00,Data byte 10: 0xff
132,1233399120.00,Data byte 11: 0xff
133,1233403120.00,Data byte 12: 0xff
134,1233407120.00,Data byte 13: 0xff
135,1233411120.00,Data byte 14: 0xff
136,1233415120.00,Data byte 15: 0xff
137,1233419120.00,Data byte 16: 0xff
138,1233423120.00,Data byte 17: 0xff
139,1233427120.00,Data byte 18: 0xff
140,1233431120.00,Data byte 19: 0xf8
141,1233435640.00,Data byte 20: 0xff
142,1233439640.00,Data byte 21: 0xff
143,1233443640.00,Data byte 22: 0xff
144,1233447640.00,Data byte 23: 0xff
145,1233451640.00,Data byte 24: 0xff
146,1233455640.00,Data byte 25: 0xff
147,1233459640.00,Data byte 26: 0xff
148,1233463640.00,Data byte 27: 0xff
149,1233467640.00,Data byte 28: 0xff
150,1233471640.00,Data byte 29: 0xff
151,1233475640.00,Data byte 30: 0xff
152,1233479640.00,Data byte 31: 0xff
153,1233483640.00,Data byte 32: 0xf1
154,1233488120.00,Data byte 33: 0xff
155,1233492120.00,Data byte 34: 0xff
156,1233496120.00,Data byte 35: 0xff
157,1233500120.00,Data byte 36: 0xff
158,1233504120.00,Data byte 37: 0xff
159,1233508120.00,Data byte 38: 0xff
160,1233512120.00,Data byte 39: 0xff
161,1233516120.00,Data byte 40: 0xff
162,1233520120.00,Data byte 41: 0xff
163,1233524120.00,Data byte 42: 0xff
164,1233528120.00,Data byte 43: 0xff
165,1233532120.00,Data byte 44: 0xff
166,1233536120.00,Data byte 45: 0xe3
167,1233540640.00,Data byte 46: 0xff
168,1233544640.00,Data byte 47: 0xff
169,1233548640.00,Data byte 48: 0xff
170,1233552640.00,Data byte 49: 0xff
171,1233556640.00,Data byte 50: 0xff
172,1233560640.00,Data byte 51: 0xff
173,1233564640.00,Data byte 52: 0xff
174,1233568640.00,Data byte 53: 0xff
175,1233572640.00,Data byte 54: 0xff
176,1233576640.00,Data byte 55: 0xff
177,1233580640.00,Data byte 56: 0xff
178,1233584640.00,Data byte 57: 0xff
179,1233588640.00,Data byte 58: 0xc7
180,1233593120.00,Data byte 59: 0xff
181,1233597120.00,Data byte 60: 0xff
182,1233601120.00,Data byte 61: 0xff
183,1233605120.00,Data byte 62: 0xff
184,1233609120.00,Data byte 63: 0xff
185,1233613640.00,Stuff count: 111
186,1233615120.00,Parity: 1
187,1233615600.00,CRC-21 sequence: 0x1fffff
188,1233629120.00,CRC delimiter: 1
189,1233641640.00,ACK slot: ACK
190,1233643640.00,ACK delimiter: 1
191,1233645640.00,End of frame
192,1233693680.00,Start of frame
193,1233695680.00,Identifier: 2047 (0x7ff)
194,1233717680.00,Substitute remote request: 1
195,1233719680.00,Identifier extension bit: extended frame
196,1233721680.00,Extended Identifier: 262143 (0x3ffff)
197,1233721680.00,Full Identifier: 536870911 (0x1fffffff)
198,1233759680.00,Remote requset substituion: 1
199,1233761680.00,Flexible data format: 1
200,1233763680.00,Reserved bit 0: 1
201,1233766880.00,Bit rate switch: 1
202,1233767760.00,Error state indicator: 1
203,1233768280.00,Data length code: 15
204,1233770280.00,Data byte 0: 0xff
205,1233774280.00,Data byte 1: 0xff
206,1233778280.00,Data byte 2: 0xff
207,1233782280.00,Data byte 3: 0xff
208,1233786280.00,Data byte 4: 0xff
209,1233790280.00,Data byte 5: 0xff
210,1233794280.00,Data byte 6: 0xfc
211,1233799160.00,Data byte 7: 0x7f
212,1233803160.00,Data byte 8: 0xff
213,1233807160.00,Data byte 9: 0xff
214,1233811160.00,Data byte 10: 0xff
215,1233815160.00,Data byte 11: 0xff
216,1233819160.00,Data byte 12: 0xff
217,1233823160.00,Data byte 13: 0xff
218,1233827160.00,Data byte 14: 0xff
219,1233831160.00,Data byte 15: 0xff
220,1233835160.00,Data byte 16: 0xff
221,1233839160.00,Data byte 17: 0xff
222,1233843160.00,Data byte 18: 0xff
223,1233847160.00,Data byte 19: 0xf8
224,1233851680.00,Data byte 20: 0xff
225,1233855680.00,Data byte 21: 0xff
226,1233859680.00,Data byte 22: 0xff
227,1233863680.00,Data byte 23: 0xff
228,1233867680.00,Data byte 24: 0xff
229,1233871680.00,Data byte 25: 0xff
230,1233875680.00,Data byte 26: 0xff
231,1233879680.00,Data byte 27: 0xff
232,1233883680.00,Data byte 28: 0xff
233,1233887680.00,Data byte 29: 0xff
234,1233891680.00,Data byte 30: 0xff
235,1233895680.00,Data byte 31: 0xff
236,1233899680.00,Data byte 32: 0xf3
237,1233904160.00,Data byte 33: 0xff
238,1233908160.00,Data byte 34: 0xff
239,1233912160.00,Data byte 35: 0xff
240,1233916160.00,Data byte 36: 0xff
241,1233920160.00,Data byte 37: 0xff
242,1233924160.00,Data byte 38: 0xff
243,1233928160.00,Data byte 39: 0xff
244,1233932160.00,Data byte 40: 0xff
245,1233936160.00,Data byte 41: 0xff
246,1233940160.00,Data byte 42: 0xff
247,1233944160.00,Data byte 43: 0xff
248,1233948160.00,Data byte 44: 0xff
249,1233952160.00,Data byte 45: 0xff
250,1233956160.00,Data byte 46: 0xff
251,1233960160.00,Data byte 47: 0xff
252,1233964160.00,Data byte 48: 0xff
253,1233968160.00,Data byte 49: 0xff
254,1233972160.00,Data byte 50: 0xff
255,1233976160.00,Data byte 51: 0xff
256,1233980160.00,Data byte 52: 0xff
257,1233984160.00,Data byte 53: 0xff
258,1233988160.00,Data byte 54: 0xff
259,1233992160.00,Data byte 55: 0xff
260,1233996160.00,Data byte 56: 0xff
261,1234000160.00,Data byte 57: 0xff
262,1234004160.00,Data byte 58: 0xff
263,1234008160.00,Data byte 59: 0xff
264,1234012160.00,Data byte 60: 0xff
265,1234016160.00,Data byte 61: 0xff
266,1234020160.00,Data byte 62: 0xff
267,1234024160.00,Data byte 63: 0xff
268,1234028680.00,Stuff count: 111
269,1234030160.00,Parity: 1
270,1234030640.00,CRC-21 sequence: 0x1fffff
271,1234044160.00,CRC delimiter: 1
272,1234473680.00,ACK slot: NACK
273,1234475680.00,ACK delimiter: 1
274,1234477680.00,End of frame

  • 0 in reply to Leon Von
    Prodigy 40 points

    error corrected： I used an oscilloscope to measure the voltage range of CANL and CANH when I transmited a message, the CANL and CANH are 2.0- 2.8v.

    the CANL and CANH are 2.0- 2.8v. It is the voltage after powering on, not  transmite messages.

    when I transmited a message, oscilloscope  capture the CANH and CANL waveforms as follow:

  • 0 in reply to Leon Von
    TI__Mastermind 35410 points

    Hi Leon,

    Can you provide me a register dump (read back value) of all the register values your code is configuring the TCAN4550 with so that I can review the final device configuration?

    Are you trying to send data payloads with all 0xFF bytes?  The data buffer array in the demo code does not have 0xFF bytes, nor does it transmit 64 byte frames, so I wanted to verify what you expect the CAN message to be?  Can you read back the contents of the TX Message Buffer before you send it so that we can compare that to what you think you are trying to send?

    What are the bytes in the TX buffer for the message you are trying to transmit?  I would like to confirm all of the bits are correct.

    If there is a difference in any of the TX buffer contents, then we may not be transmitting a valid CAN frame, or we may have an address issue and are trying to send a message from an different TX buffer.

    Another good debug tool would be to use a logic analyzer to capture the SPI read and write communication into a log.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 40 points

    Hi Jonathan,

    1.You can review the final device configuration by file_log.txt.   

    2. I am  not   trying to send data payloads with all 0xFF bytes, I am trying two msgs:

        uint8_t data[8] = {0x55, 0x66, 0x77, 0x88};     // Define the data payload
    header.DLC = MCAN_DLC_8B;                       // Set the DLC to be equal to or less than the data payload (it is ok to pass a 64 byte data array into the WriteTXFIFO function if your DLC is 8 bytes, only the first 8 bytes will be read)
    header.ID = 0x144;                              // Set the ID
    header.FDF = 1;                                 // CAN FD frame enabled
    header.BRS = 1;                                 // Bit rate switch enabled
    
        /* Let's make a different CAN message */
    data[0] = 0x11;
    data[1] = 0x22;
    data[2] = 0x33;
    data[3] = 0x44;                                 // Define the data payload
    header.DLC = MCAN_DLC_16B;                       // Set the DLC to be equal to or less than the data payload (it is ok to pass a 64 byte data array into the WriteTXFIFO function if your DLC is 8 bytes, only the first 8 bytes will be read)
    header.ID = 0x123;                              // Set the ID
    header.FDF = 1;                                 // CAN FD frame enabled
    header.BRS = 1;                                 // Bit rate switch enabled
    header.EFC = 0;
    header.MM  = 0;
    header.RTR = 0;
    header.XTD = 0;                                 // We are not using an extended ID in this example
    header.ESI = 0;                                 // Error state indicator

    3. the contents of the TX Message Buffer before you send it :  

    W: 0x41 0x81 0x74 0x24

    TX buffer Data,star address:0x8174
    R: 0xa0 0x00 0x00 0x00
    R: 0x05 0x10 0x00 0x00
    R: 0x00 0x38 0x00 0x00
    R: 0x88 0x77 0x66 0x55
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x04 0x8c 0x00 0x00
    R: 0x00 0x3a 0x00 0x00
    R: 0x44 0x33 0x22 0x11
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x01 0x23
    R: 0x00 0x00 0x00 0x3a
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00
    R: 0x00 0x00 0x00 0x00

     

    The MRAM confihuration:

    Fullscreen File_log.txt Download 
    [TCAN] TCAN4550 Test Started...

TCAN4x5x_Device_ClearSPIERR & Disable all non-MCAN Interrupt
W: 0x61 0x00 0x0c 0x01 0xff 0xff 0xff 0xff 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x61 0x08 0x30 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x08 0x30 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x80 0x96 0x28 0xff 
W: 0x41 0x08 0x20 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x10 0x00 0x00 

If the Power On ,clear it.
W: 0x61 0x08 0x20 0x01 0x00 0x10 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x18 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x19 

W: 0x61 0x10 0x18 0x01 0x00 0x00 0x00 0x03 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x18 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x1b 

TCAN4x5x_MCAN_EnableProtectedRegisters
W: 0x61 0x10 0x18 0x01 0x00 0x00 0x03 0x03 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x18 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x1b 
W: 0x41 0x08 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xc8 0x00 0x04 0x68 

GlobalFilter
W: 0x61 0x10 0x80 0x01 0x00 0x00 0x00 0x03 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x80 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x03 

NominalTiming_Simple
W: 0x61 0x10 0x1c 0x01 0x0e 0x01 0x1e 0x07 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x1c 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x0e 0x01 0x1e 0x07 

DataTiming_Simple
W: 0x61 0x10 0x0c 0x01 0x00 0x80 0x0d 0x44 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x0c 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x80 0x0d 0x44 
W: 0x61 0x10 0x48 0x01 0x00 0x00 0x0e 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x48 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x0e 0x00 
W: 0x61 0x10 0x20 0x01 0x00 0x00 0x00 0x02 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 

TCAN4x5x_MRAM_Clear
W: 0x61 0x80 0x00 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
...
W: 0x61 0x87 0xf8 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x61 0x87 0xfc 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 

MRAMConfiguration
W: 0x61 0x10 0x84 0x01 0x00 0x01 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x84 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x01 0x00 0x00 
W: 0x61 0x10 0x88 0x01 0x00 0x01 0x00 0x04 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x88 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x01 0x00 0x04 
W: 0x61 0x10 0xa0 0x01 0x80 0x05 0x00 0x0c 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xa0 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x80 0x05 0x00 0x0c 
W: 0x61 0x10 0xb0 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xb0 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x61 0x10 0xac 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xac 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x61 0x10 0xf0 0x01 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xf0 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x61 0x10 0xc0 0x01 0x42 0x00 0x01 0x74 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xc0 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x42 0x00 0x01 0x74 
W: 0x61 0x10 0xbc 0x01 0x00 0x00 0x07 0x77 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xbc 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x07 0x77 
W: 0x61 0x10 0xc8 0x01 0x00 0x00 0x00 0x07 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0xc8 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x07 

DisableProtectedRegisters
W: 0x41 0x10 0x18 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x1b 
W: 0x61 0x10 0x18 0x01 0x00 0x00 0x03 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x10 0x18 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x19 
W: 0x61 0x10 0x54 0x01 0x00 0x00 0x00 0x01 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x61 0x10 0x5c 0x01 0x00 0x00 0x00 0x01 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x61 0x80 0x00 0x01 0xa8 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x80 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xa8 0x00 0x00 0x00 
W: 0x61 0x80 0x04 0x01 0xb2 0x34 0x56 0x78 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x80 0x04 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xb2 0x34 0x56 0x78 
W: 0x61 0x80 0x08 0x01 0x9f 0xff 0xff 0xff 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x80 0x08 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x9f 0xff 0xff 0xff 

Device_Configure
W: 0x41 0x08 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xc8 0x00 0x04 0x68 
W: 0x61 0x08 0x00 0x01 0xc8 0x00 0x04 0x60 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x08 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xc8 0x00 0x04 0x60 

Device_SetMode
W: 0x41 0x08 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xc8 0x00 0x04 0x60 
W: 0x61 0x08 0x00 0x01 0xc8 0x00 0x04 0xa0 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x08 0x00 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0xc8 0x00 0x04 0xa0 

ClearInterruptsAll
W: 0x61 0x10 0x50 0x01 0xff 0xff 0xff 0xff 
R: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x41 0x08 0x30 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x80 0x96 0x28 0xff 

write tx buffer
W: 0x61 0x81 0x74 0x04 
R: 0xa0 0x00 0x00 0x00 
W: 0x05 0x10 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x38 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x88 0x77 0x66 0x55 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x61 0x81 0xbc 0x06 
R: 0xa0 0x00 0x00 0x00 
W: 0x04 0x8c 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x3a 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x44 0x33 0x22 0x11 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x00 0x01 0x23 
R: 0x00 0x00 0x00 0x00 
W: 0x00 0x00 0x00 0x3a 
R: 0x00 0x00 0x00 0x00 

Read TX BUFFER start 0x8174: 
W: 0x41 0x81 0x74 0x24 
R: 0xa0 0x00 0x00 0x00 
R: 0x05 0x10 0x00 0x00 
R: 0x00 0x38 0x00 0x00 
R: 0x88 0x77 0x66 0x55 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x04 0x8c 0x00 0x00 
R: 0x00 0x3a 0x00 0x00 
R: 0x44 0x33 0x22 0x11 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x01 0x23 
R: 0x00 0x00 0x00 0x3a 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 

Read TX BUFFER end 
W: 0x61 0x10 0xd0 0x01 0x00 0x00 0x00 0x02 
R: 0xa0 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
W: 0x61 0x10 0xd0 0x01 0x00 0x00 0x00 0x01 
R: 0xa0 0x00 0x00 0x00 0x00 0x00 0x00 0x00

  • 0 in reply to Leon Von
    TI__Mastermind 35410 points

    HI Leon,

    I will review your register configuration information and then follow up with you on any additional questions and suggestions I have.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    TI__Mastermind 35410 points

    Hi Leon,

    Sorry for the delay, but I have reviewed your register configuration. 

    I noticed that you are setting the Transmit Delay Compensation Offset (TDCO) to 0xE but the Transmit Delay Compensation Filter (TDCF) to 0x0. 

    Generally it is good to always set TDCO and TDCF to the same value.  The TDCF value sets the minimum Secondary Sample Position (SSP) in the CAN FD bit and if this value is to low, the SSP will not be correctly set by the TDCO position and this could result in bit errors.

    It looks like you are transmitting messages and the voltage levels look correct for CANH and CANL.  The portion of signals you are sharing look consistent with a lot of consecutive data bits that require periodic Stuff bits to be added.  But there is not enough of the signal for me to determine exactly what portion of the CAN message I'm looking at.

    I decode your register configuration for a Nominal data rate of 500kbps and a Data rate of 2Mbps.  Is that your intention?  Do you see a faster bit rate during your message transmission?

    I've looked back through the thread and I am unclear about what issue we are trying to resolve.  Was your question simply related to why the CANERR bit was getting set, or are there other issues preventing you from transmitting and receiving messages? 

    Can you please restate the specific issues that need to be resolved?

    Thanks,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 40 points

    Hi, Jonathan.

    "I decode your register configuration for a Nominal data rate of 500kbps and a Data rate of 2Mbps.  Is that your intention?"

    yes, that is my intention, I want to configuration for a Nominal data rate of 500kbps and a Data rate of 2Mbps. 

    My main problem is that I want my code to run on the development board to achieve CAN message  transmission and receive. 

    The issue now is that I configured the hardware and write Tx buffer according to TCAN demo code, but the messages sent to the bus always have strong CNA errors. I don`t know where the problem lies.

     

    I noticed that you are setting the Transmit Delay Compensation Offset (TDCO) to 0xE but the Transmit Delay Compensation Filter (TDCF) to 0x0. 

    after I set DCO and TDCF to the same value, CANOE test had stuff error.

    I sent message according to TCAN demo code, but capture the CANH and CANL waveforms are strange. Most of them are 1(recessive). 

    I don't quite know what to do next.

    Regards,

    Leon

     

  • 0 in reply to Leon Von
    TI__Mastermind 35410 points

    Hi Leon,

    Thank you, I have a better understanding now of the overall issue.  I'll point out two additional documents that are helpful that you may or may not have already seen.

    TCAN45xx Software User's Guide

    MCAN User's Manual

    Ok.  First, can you tell me which development board you are using?  Is it one created by TI such as TCAN4550EVM or BOOSTXL-CANFD-LIN?

    Can you verify if there is 120 ohms of termination on both sides of the CAN bus between CANH and CANL?

    Leon Von said:
    after I set DCO and TDCF to the same value, CANOE test had stuff error.

    Does this mean you did not get CAN errors when you had TDCF set to 0 while TDCO = 14?  Or did you still get errors regardless of the TDCF setting?  I usually see CAN errors when they are set differently, but not when they are set to the same value.  So the reason for the errors may not be related to the TDCO/F settings.  However, this is important because if not set correctly, it will result in errors.  The MCAN User's Manual has more information on how these two settings create the Secondary Sample Point.

    Have you verified the CANoe bit timing matches the TCAN4550 configuration?  It is possible to have bit errors in CAN FD messages if the bit rates are the same, but there are different numbers of time quanta used and the sample point is in a different position in the bit period.  This is because the switch from the Nominal bit rate to the Data bit rate occurs at the sample point in the BRS bit in the message.  If the sample points are different between the nodes, then one device may switch to FD mode before another device is ready and an error is generated.  So, it is always recommended to have the same settings for all nodes on a CAN bus.

    Can you receive messages sent from CANoe without errors, or do you get errors when trying to receive messages as well?  We need to see if errors are generated for both RX and TX messages, or for only one direction so that we can find the root cause.

    Can you provide scope plots of an entire CAN message being transmitted?  Because CANH and CANL are differential, it's best to have the same GND reference location on the scope so the waveforms are aligned properly without a separation.

    Can you also monitor or log the following registers during your test so we can see specifically what interrupt, status, and Error Counter bits are getting set?

    0x0820 - Device Interrupts

    0x0824 or 0x1050 - MCAN Interrupts

    0x1018 - Control Register (monitor INIT bit)

    0x1040 - Error Counter Register (CAN transmit and receive error counters)

    0x1044 - Protocol Status Register (CAN specific status information including Error Codes)

    0x10A4 and 0x10B4 - RX FIFO 0 and RX FIFO 1 Status registers

    0x1098 and 0x109C - New Data registers (if using dedicated RX Buffers)

    0x10C4 - TX FIFO/Queue Status register

    0x10CC - TX Buffer Request Pending (to see if messages are pending transmission)

    0x10D8 - TX Buffer Add Request Transmission Occurred (to see if messages were successfully transmitted)

    Monitoring these register values during your debug will help see what bits are getting set and what is failing.  If a message gets a CAN error, then looking at the error codes can tell us what type of error it was.

    If there are too many errors, the device will between the Error Warning, Error Passive, and Bus Off states.  You can slow down this process by setting the DAR bit in the Control register to disable the Automatic Retransmission feature so that the device only tries to transmit a message once when the TX Buffer Add Request bit is set in register 0x10D0.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 40 points

    Hi, Jonathan

    Thank you for providing theses two documents; I have reviewed them.

    after I set DCO and TDCF to the same value, CANOE test had stuff error. I mean that I still get errors when I had TDCF set to 14 while TDCO = 14, they both have a value of 14.

    Have you verified the CANoe bit timing matches the TCAN4550 configuration?

    Yes, I verified the CANoe bit timing matches the TCAN4550 configuration.

    Can you receive messages sent from CANoe without errors, or do you get errors when trying to receive messages as well?  

    I get errors when trying to receive messages as well.

    Can you provide scope plots of an entire CAN message being transmitted?

    sorry , I only have logic analysis.

    Below is the register log when I send and receive messages:

    Fullscreen Reg_log.txt Download 
    [TCAN] TCAN4550 Test Started...
TCAN4x5x_Device_ClearSPIERR & Disable all non-MCAN Interrupt
If the Power On ,clear.TCAN4x5x_MCAN_EnableProtectedRegisters : 1
GlobalFilter
NominalTiming_Simple
DataTiming_Simple
MRAMConfiguration
DisableProtectedRegisters
Device_Configure
Device_SetMode
ClearInterruptsAll
Read TX BUFFER start 0x8174: 
Read TX BUFFER end 
Device Interrupts 0x0820:
W: 0x41 0x08 0x20 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
MCAN Interrupts 0824
W: 0x41 0x08 0x24 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x0b 0x81 0x00 0x00 
MCAN 0x1050 Interrupts
W: 0x41 0x10 0x50 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x0b 0x81 0x00 0x00 
Control Register 1018
W: 0x41 0x10 0x18 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x01 
Error Counter Register (CAN transmit and receive error counters) 1040
W: 0x41 0x10 0x40 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x1f 0x00 0xf8 
0x1044 - Protocol Status Register 1044
W: 0x41 0x10 0x44 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x07 0xe5 
RX FIFO 0 Status registers 0x10A4
W: 0x41 0x10 0xa4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
FIFO1 SR 0x10B4
W: 0x41 0x10 0xb4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX FIFO/Queue Status register 10C4
W: 0x41 0x10 0xc4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x20 0x00 0x00 
TX Buffer Request Pending 0X10CC
W: 0x41 0x10 0xcc 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x03 
TX Buffer Add Request Transmission Occurred 10D8
W: 0x41 0x10 0xd8 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00

  • 0 in reply to Leon Von
    Prodigy 40 points

    when I set the DAR bit in the Control register to disable the Automatic Retransmission:

    Fullscreen DAR=1.txt Download 
    [TCAN] TCAN4550 Test Started...
TCAN4x5x_Device_ClearSPIERR & Disable all non-MCAN Interrupt
If the Power On ,clear.TCAN4x5x_MCAN_EnableProtectedRegisters : 1
GlobalFilter
NominalTiming_Simple
DataTiming_Simple
MRAMConfiguration
DisableProtectedRegisters
Device_Configure
Device_SetMode
ClearInterruptsAll
Read TX BUFFER start 0x8174: 
Read TX BUFFER end 
Device Interrupts 0x0820:
W: 0x41 0x08 0x20 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
MCAN Interrupts 0824
W: 0x41 0x08 0x24 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x09 0x81 0x00 0x00 
MCAN 0x1050 Interrupts
W: 0x41 0x10 0x50 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x09 0x81 0x00 0x00 
Control Register 1018
W: 0x41 0x10 0x18 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x40 
Error Counter Register (CAN transmit and receive error counters) 1040
W: 0x41 0x10 0x40 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x12 0x00 0x90 
0x1044 - Protocol Status Register 1044
W: 0x41 0x10 0x44 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x07 0x6d 
RX FIFO 0 Status registers 0x10A4
W: 0x41 0x10 0xa4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
FIFO1 SR 0x10B4
W: 0x41 0x10 0xb4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX FIFO/Queue Status register 10C4
W: 0x41 0x10 0xc4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX Buffer Request Pending 0X10CC
W: 0x41 0x10 0xcc 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX Buffer Add Request Transmission Occurred 10D8
W: 0x41 0x10 0xd8 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00

  • 0 in reply to Leon Von
    TI__Mastermind 35410 points

    Hi Leon,

    Thanks for the register data.  The PEA bit in the Interrupt register shows there is a Protocol Error in Arbitration Phase when the Nominal Bit Time is being used. 

    The Last Error Code value is 5 - Bit0Error.  During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the devcie wanted to send a dominant level (data or identifier bit logical value '0'), but the monitored bus value was recessive.

    The Transmit Error Counter is showing a lot of errors which is in turn leading to a Bus Off condition where the device removes itself from communicating on the CAN bus and sets the INIT bit in the Control register back to 1.  The first log shows a Bus Off condition which is likely from when the device repeatedly tries to transmit a message resulting in a new transmit error for each failed attempt.

    The second log is when you disabled the automatic retransmission which shows that there are transmit errors, but the not enough to enter a Bus Off condition.

    So there could be something wrong with either the Physical CAN bus such as incorrect termination, or an incorrect wiring, etc., or a potential issue with the configuration between the devices on the nodes such as different bit timing configuration etc.

    One possible issue that can create issues is the switch between the Nominal bit rate and the faster CAN FD Data bit rate.  For now, can you try to communicate without the Bit Rate Switch by setting the BRS bit in the TX Message Header to "0" so that the message will only be transmitted at the Nominal Bit Rate?  If this is error free, then the transition between the Nominal and Data bit rates is likely where the transmit error is occurring.

    Also, if you can look at the CAN message waveforms during a transmission and verify the bit times match the bit rate, the bit values match the protocol and reach the correct amplitude levels etc., or whether there is a specific bit in the message the error is occurring on, that can help us identify the cause of the error. 

    Regards,

    Jonathan