SN65DSI86: part of the display image is distorted

shlomz

Prodigy 50 points

Part Number: SN65DSI86

Tool/software:

Hi,

the color bar pattern is displayed correctly but when loading graphics (weston)

some of the image is corrupted always in the same place.

it was tested with two different displays (AUO,BOE) with a static image (weston terminal background)

and video.

kernel version is 6.1 under NXP imx8mp yocto (langdale)

using 4 dsi lanes and 2 eDP lanes, ref clock is 27Mhz,

display is at 146500hz:

# edid-decode -c /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid -n
edid-decode (hex):

00 ff ff ff ff ff ff 00 09 e5 fc 0a 00 00 00 00
0d 1e 01 04 95 1f 11 78 02 ef 35 95 5d 59 94 2a
21 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 3a 39 80 04 71 38 28 40 30 20
36 00 35 ae 10 00 00 1a c8 2d 80 04 71 38 28 40
30 20 36 00 35 ae 10 00 00 1a 00 00 00 fe 00 58
59 43 30 35 80 4e 56 31 34 4e 34 4e 00 00 00 00
00 00 41 21 99 00 10 00 00 0a 01 0a 20 20 00 d9

----------------

Block 0, Base EDID:
EDID Structure Version & Revision: 1.4
Vendor & Product Identification:
Manufacturer: BOE
Model: 2812
Made in: week 13 of 2020
Basic Display Parameters & Features:
Digital display
Bits per primary color channel: 6
DisplayPort interface
Maximum image size: 31 cm x 17 cm
Gamma: 2.20
Supported color formats: RGB 4:4:4
First detailed timing includes the native pixel format and preferred refresh rate
Color Characteristics:
Red : 0.5849, 0.3652
Green: 0.3505, 0.5810
Blue : 0.1640, 0.1318
White: 0.3134, 0.3291
Established Timings I & II: none
Standard Timings: none
Detailed Timing Descriptors:
DTD 1: 1920x1080 60.002 Hz 16:9 67.202 kHz 146.500 MHz (309 mm x 174 mm)
Hfront 48 Hsync 32 Hback 180 Hpol P
Vfront 3 Vsync 6 Vback 31 Vpol N
DTD 2: 1920x1080 48.001 Hz 16:9 53.761 kHz 117.200 MHz (309 mm x 174 mm)
Hfront 48 Hsync 32 Hback 180 Hpol P
Vfront 3 Vsync 6 Vback 31 Vpol N
Alphanumeric Data String: 'XYC05'

the display panel driver (panel-edp.c) timings match the edid,

thanks.

over 2 years ago

0 David (ASIC) Liu over 2 years ago

TI__Guru**** 190131 points

Hi,

Can you dump out the DSI86 register for review?

Also, can you map HSYNC and VSYNC to the DSI86 GPIO pins and measure the HSYNC and VSYNC frequency using a scope?

Thanks

David

0 shlomz over 2 years ago in reply to David (ASIC) Liu

Prodigy 50 points

Hi David,

these are the status registers:

STATUS REGISTERS:
[0xf0] = 0x00000000
[0xf1] = 0x00000000
[0xf2] = 0x00000000
[0xf3] = 0x00000000
[0xf4] = 0x00000001
[0xf5] = 0x00000000
[0xf6] = 0x00000002
[0xf7] = 0x00000000
[0xf8] = 0x00000001

i don't have access to scope the dsi lines.

ill get the mapping for the gpios

0 David (ASIC) Liu over 2 years ago in reply to shlomz

TI__Guru**** 190131 points

Hi,

Besides the status registers, can you dump out all the DSI86 registers for my to review?

Thanks

David

0 shlomz over 2 years ago in reply to David (ASIC) Liu

Prodigy 50 points

Hi,

this is the reg dump:

0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 86 00 00 01 00 00 68ISD ?.?..?..
10: 26 00 57 00 00 00 00 00 00 00 00 00 00 00 00 00 &.W.............
20: 80 07 00 00 38 04 00 00 00 00 00 00 20 00 00 00 ??..8?...... ...
30: 06 00 00 00 b4 00 1f 00 30 00 03 00 00 00 00 00 ?...?.?.0.?.....
40: 57 46 00 00 80 00 84 08 60 04 d4 00 25 00 20 00 WF..?.??`??.%. .
50: 06 00 80 07 38 04 00 00 40 e4 0d 01 11 00 b0 00 ?.??8?..@????.?.
60: a0 60 a4 00 00 00 00 00 00 00 00 00 00 00 00 00 ?`?.............
70: 00 00 00 00 00 01 02 01 80 81 00 00 00 00 00 00 .....?????......
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c .........?|????|
90: f0 c1 07 24 80 00 01 04 01 00 00 00 00 00 00 00 ???$?.???.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00 ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 01 00 02 00 01 00 00 00 00 00 00 00 ....?.?.?.......

I got the display to work correctly in one of many retries and noticed that it sets the dp rate register (0x94) to 0x20 (1.62Gbps)

and when the display shows the distortion the dp rate is at 0x80 (2.7Gbps).

since the rate is determined during training I cant figure out the cause of the problem.

0 David (ASIC) Liu over 2 years ago in reply to shlomz

TI__Guru**** 190131 points

Hi,

What is your DSI CLK frequency? Can you reduce the DSI CLK frequency down to 330MHz?

Thanks

David

0 shlomz over 2 years ago in reply to David (ASIC) Liu

Prodigy 50 points

clock is at 0x57, reduced to 0x42 (330Mhz) and to 0x47 as in the the occurrence that worked correctly but still distorted image remains.

0 Vishesh Pithadiya over 2 years ago in reply to shlomz

TI__Guru 59746 points

Hey Shlomi,

I'm looking into your register calcs to double check. but if you're able to get the color bar working the issue is stemming from a timing mismatch.

shlomz said:
STATUS REGISTERS:
[0xf0] = 0x00000000
[0xf1] = 0x00000000
[0xf2] = 0x00000000
[0xf3] = 0x00000000
[0xf4] = 0x00000001
[0xf5] = 0x00000000
[0xf6] = 0x00000002
[0xf7] = 0x00000000
[0xf8] = 0x00000001

Are these status registers from the working case at 1.6Gbps or the distorted case at 2.7Gbps?

0 shlomz over 2 years ago in reply to Vishesh Pithadiya

Prodigy 50 points

Hi,

these regs are from the 2.7Gbps.

what should i look for in timings mismatch besides the dsi clock?

0 David (ASIC) Liu over 2 years ago in reply to shlomz

TI__Guru**** 190131 points

Hi,

You can also look at the HSYNC and VSYNC timing. Can you map HSYNC and VSYNC to the DSI86 GPIO pins and measure the HSYNC and VSYNC frequency using a scope?

Thanks

David

0 shlomz over 2 years ago in reply to David (ASIC) Liu

Prodigy 50 points

HI,

reg 0x5Fis 0x44 meaning no mapping to hsync/vsync if I'm reading this right.

0 David (ASIC) Liu over 2 years ago in reply to shlomz

TI__Guru**** 190131 points

Hi,

You have to write to register 0x5F. For example, if you write 0x08h to register 0x5F, this will map VSYNC to GPIO2. You can then probe the DSI86 GPIO2 pin to measure the VSYNC frequency.

Thanks
David