Tool/software:
TI PCIe Gen 5/Gen 4 redrivers have powerdown (PD or PWDN) pins. How should I configure them, and why does TI suggest connecting them to inverted PERST# or PRSNT#?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software:
TI PCIe Gen 5/Gen 4 redrivers have powerdown (PD or PWDN) pins. How should I configure them, and why does TI suggest connecting them to inverted PERST# or PRSNT#?
Powerdown pins have a simple working principle:
There are several ways the powerdown pins could be configured depending on the application:
Powerdown pins can be connected to multiple control signals at the same time, in this case it's recommended to use a logic OR gate to prevent possible conflicts between the input signals (one may be logical high while the other may be logical low, better to avoid the possibility of a short).
The connection to inverted PERST# is the most common and applicable recommendation. It increases system flexibility and can prevent odd problems later on, so having at least a provision for an inverter and a PERST# trace is a good idea during schematic and layout design.
Best,
Evan Su