DP83867E: Three questions regarding using DP83867ERGZR

Buddika Sumanasena

Part Number: DP83867E

Tool/software:

I have three questions I need to clarify in designing a board using DP83867E. I plan to use the SGMII mode with 4-Wire Connections.

1) In this case I dont use pins TX_D2, TX_D3, GTX_CLK, RX_CLK, TX_CTRL In this case should I connect them to GND with a resistor.

2) If I use a silicon oscillator what should I do to pin XO,

3) Absolute Maximum Ratings of the device says the voltage range for MDI pins is -0.3V to 6.5V. These pins are driven by a transformer with center tap connected to ground by a capacitor. See Figure 8-2. Magnetics Connections of the datasheet. Since the center tap is connected to GND for AC signals ( via capacitor), shouldn't one of the pins in the differential pair be always negative? Cant this violate the absolute maximum rating of -0.3V at MDI pins?

Best regards,

Buddika

over 1 year ago

0 Hillman Lin over 1 year ago

TI__Mastermind 26035 points

Hi Buddika,

1) TX_D2, TX_D3, GTX_CLK, RX_CLK, and TX_CTRL are not the strap pin. It could be left floating if it is not used.

2) XO pin could leave it floating

3) When MDI is operating, there should be a DC voltage on the MDI lines.

Regards,

Hillman Lin

0 Buddika Sumanasena over 1 year ago in reply to Hillman Lin

Prodigy 60 points

Hi Hillman,

1) The datasheet recommends to tie unused pins to VDDIO or GND. Should I do the same to these pins?

2) Sounds good.

3) What I meant was at the frequencies at which signals are sent the capacitors has very small impedance. Doesn't this mean that the center tap of the transformer is at 0V? In that case one of the two other pins of the differential pair should have negative voltage.

Best regards,

Buddika

0 Hillman Lin over 1 year ago in reply to Buddika Sumanasena

TI__Mastermind 26035 points

Hi Buddika,

I am not sure if I understand your concern:

Center tap only effect the common mode voltage. The DC bias at the center tap should be around 1.65V for DC bias point. This should not be a concern.

Regards,

Hillman Lin

0 Buddika Sumanasena over 1 year ago in reply to Hillman Lin

Prodigy 60 points

Hi Hillman,

Lets, consider Figure 8-2. Magnetics Connections for example. Lets say a TD_P_X and TD_M_X pair is driven by the pulse transformer. In this case how can you guarantee that the center tap is about 1.65V. The center tap is not driven by the IC.

Best regards,

Buddika

0 Hillman Lin over 1 year ago in reply to Buddika Sumanasena

TI__Mastermind 26035 points

Hi Buddika,

The internal voltage mode driver inside this pin will guarantee the lines is driven at 1.65V.

Further detail is not sharable externally. These two pins TD_P and TD_M won't drop below the absolute maximum rating.

Regards,

Hillman Lin

0 Buddika Sumanasena over 1 year ago in reply to Hillman Lin

Prodigy 60 points

Hi Hillman,

Is the voltage of 1.65V irrespective of the VDDIO voltage. Is the 1.65V voltage still maintained when those pins are driven by the pulse transformer - when they are input pins.

Best regards,

Buddika

0 Hillman Lin over 1 year ago in reply to Buddika Sumanasena

TI__Mastermind 26035 points

Hi Buddika,

I am still not too sure on your concern. If possible, could you draw out the concern you have?

Regards,

Hillman Lin

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DP83867E: Three questions regarding using DP83867ERGZR