SN65LVDS2: Please suggest Output level is Low solution???

No.

For historical reasons, the default state of many logic signals is high because this is easier to implement with NPN transistors. Therefore, the output state of fail-safe circuits is high.

You could exchange the A/B signals and add an inverter.

Hi Paul,

Most applications expect a high receiver output under failsafe: see TI note AN-1194 Failsafe Biasing of LVDS Interfaces "Also, most applications expect a HIGH receiver output under failsafe conditions. This is typically the case supported, however it should be noted that some applications may require a LOW state."

Table 8-2. Receiver Function shows that when VID ≤ –100 mV the output will be low. Pull down resistors can be implemented to overcome the HIGH state of the output. Please refer to this post for more information on this: (+) DS90LV048A: Output LOW on Fail-safe - LVDS Rx

Regards, Amy

Sounds good, thank you Paul. Please reach out with any other questions.

-Amy