This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83867CR: transmit isue

Part Number: DP83867CR

Tool/software:

Hi Team,

Customer's use of TI DP83867CR PHY,
The architecture connected to the PoE switch is as follows:

MAC uses RTL8382M (integrated 8port 1G PHY)
Two external RTL8218D (8 port 1G PHY)

Customers found that there are two different situations when using the TI DP83867CR port to connect to the switch. 

1. Connect to the port of RTL8382M, it can work normally and transmit at the highest speed without any problem.
2. Connect to the port of RTL8218D, the transmission rate is only 30-40%.

Does DP83867CR have compatibility issues with RTL8218D?
Can DP83867CR set or improve this compatibility issues?

  • Hi Tommy,

    When you said transmission rate is only 30% to 40%, are you seeing an packets loss at ~60%?

    If so, did you see any link drop when you connect to RTL8218D? We never seen this issue before. We would like to have better understanding on the behavior of DP83867PHY?

    If possible, could you also share the register log from 0x0000 to 0x001F for DP83867?

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    ok~ we ask the customer to share register log file to us, please wait for us, thanks.

  • Hi Tommy,

    I will wait for customer's response.

    --
    Regards,

    Hillman Lin

  • Hi Hillman,

    as attached, the customer response to  us about the register log file, thanks.

    DP83867CR~# phytool read eth000x0000.txt
    ~# phytool read eth0/0/0x0000
    0x1140
    ~# phytool read eth0/0/0x0001
    0x796d
    ~# phytool read eth0/0/0x0002
    0x2000
    ~# phytool read eth0/0/0x0003
    0xa231
    ~# phytool read eth0/0/0x0004
    0x01e1
    ~# phytool read eth0/0/0x0005
    0xc1e1
    ~# phytool read eth0/0/0x0006
    0x006f
    ~# phytool read eth0/0/0x0007
    0x2001
    ~# phytool read eth0/0/0x0008
    0x6801
    ~# phytool read eth0/0/0x0009
    0x0300
    ~# phytool read eth0/0/0x000a
    0x3800
    ~# phytool read eth0/0/0x000b
    0000
    ~# phytool read eth0/0/0x000c
    0000
    ~# phytool read eth0/0/0x000d
    0x401f
    ~# phytool read eth0/0/0x000e
    0x0088
    ~# phytool read eth0/0/0x000f
    0x3000
    ~# phytool read eth0/0/0x0010
    0x4040
    ~# phytool read eth0/0/0x0011
    0xbc02
    ~# phytool read eth0/0/0x0012
    0000
    ~# phytool read eth0/0/0x0013
    0x1c42
    ~# phytool read eth0/0/0x0014
    0x29c7
    ~# phytool read eth0/0/0x0015
    0000
    ~# phytool read eth0/0/0x0016
    0000
    ~# phytool read eth0/0/0x0017
    0x0040
    ~# phytool read eth0/0/0x0018
    0x6150
    ~# phytool read eth0/0/0x0019
    0x4444
    ~# phytool read eth0/0/0x001a
    0x0002
    ~# phytool read eth0/0/0x001b
    0000
    ~# phytool read eth0/0/0x001c
    0000
    ~# phytool read eth0/0/0x001d
    0000
    ~# phytool read eth0/0/0x001e
    0x0002
    ~# phytool read eth0/0/0x001f
    0000
    

  • Hi Tommy,

    Are all the register provided based on the 60% packets loss scenario?

    Based on the register log you send me, it seems like the PHY is functioning correctly. There are no Link drop or any RX_ER or IDLE errors recorded.

    One more thing I would like to check is register 0x0032 FIFO register. 

    If this register 0x0032 also indicate no FIFO occur, I would take a look on the interface between MAC and PHY.

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    may we know if DP83867CR has parameter similar to the below that can be modified?

  • Hi Tommy,

    May I ask what is the purpose of these bits? I would like more information on this register to help me look for it better.

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    Edge rate is parameter that can be adjusted for IEEE802.3,  it is use for PHY output waveform as below the attachment.

    1G port 2.pdf

  • Hi Tommy,

    it seems like you pass everything in the compliance test. Are your struggling on the communication or link up for DP83867. Did you see any functional issue?

    What is the core issue?

    --

    Regards,

    Hillman Lin

  • 嗨希爾曼,

    DP83867 can Control the transmit DAC slew rate in 100BASE-TX mode? like the competitor information as below .

  • Hi Tommy,

    We did not have customer ask for this register before. The register maybe reversed for external customer. We need to have a good reason to reach out to design and possibly enable this register.

    If possible, may I ask the following questions so that we can reach out to design team for further info:

    •  Did you see any functional issue?
    • What is the core issue?

    --

    Regards,

    Hillman Lin