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DS90UH983-Q1: I2C, HPD not working

Aravind R
Prodigy 10 points
Part Number: DS90UH983-Q1

Tool/software:

Hi team,

We are using DS90UH983-Q1 serializer for our automobile appication.

we are using I2C pins of 33,34 connected to Intel arria 10 FPGA with pull up of1.8 V and remaining i2c pins 35,36,37,38 is not used hence is also pulled up with 1.8V.

We could able to view data and clock waveforms when executing i2c commands. whenever we use i2cdetect commands, its showing like no device is connected on the bus 0. please see the below details. 

Also , Our HPD is not going high eventhough Modesel1 is high. 

Because of i2c, does HPD is affected? 

Please provide possible support

  • 0
    TI__Guru 66840 points

    Hi Aravind,

    Do you have I2C waveforms with digital analyzer so we can distinguish if there is activity on the I2C bus? 

    Regards, 

    Logan

  • 0
    Prodigy 10 points

    Hi,

    Here i have attached the I2C waveforms...we received NACK from the slave address of 0C 

    Also we have one working board..please have a look

    Regards,

    Aravind

  • 0 in reply to Aravind R
    TI__Guru 66840 points

    Hi Aravind, 

    It looks like there is no ACK in the failure case. Can you confirm that the SER is actually PDB=High during this time? Otherwise, can you also confirm the setpoint of the IDX pin, which determines the device address for the SER. 

    Regards, 

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 10 points

    Hi,

    PDB is high at this time..and IDX pin is configured such that for i2c voltage level of 1.8V.. R1 pullup resistor is open and R2 pulldown resistor is 10K hence 0X0C is our Slave address..we received low at this pin

  • +1 in reply to Aravind R
    TI__Guru 66840 points

    Hi Aravind,

    There does not appear to be any gross issue on the I2C transaction itself when you get this NACK. Pull-down strength looks to be proper threshold, device address is the same as passing case, etc.

    Can you provide a waveform of the power-on sequence? Maybe the device is getting improperly strapped or some other issue.

    What is the success/non-success rate of the transactions? Is it only some power cycles that it works, or every transaction has a chance of ACKing?

    Regards,

    Logan

  • 0
    Prodigy 10 points

    Hi Logan,

    The I2C issue has been resolved. we have found that One of the VDD pin is not properly powered.Now, I2C protocol is acking properly.

    Now another issue is like...HPD signal is going high at serializer end....this signal is fed to Arria 10 SOC and from here it drives a LED...

    Eventhough HPD is going high...we are not able to get acknowledgement from SOC (by knowing LED is ON)

    What are the signals HPD is dependent ? Any signal line going to FPGA needs to be checked?

  • 0 in reply to Aravind R
    TI__Guru 66840 points

    Hi Aravind,

    Can you clarify HPD signal? Are you referring to DP HPD or something else?

    DP HPD will assert automatically on start-up.

    Regards,

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 10 points

    Hi,

    Yes, this is related to DP HPD...

    So it asserts during startup and doesnt depends on any signal line to go high?

  • +1 in reply to Aravind R
    TI__Guru 66840 points

    Hi Aravind, 

    This is correct, per DP specification DPRX sink will assert this when its ready to link train with the DPTX source. It will initially assert, but will also momentary de-assert during initialization or any resets. 

    Seems like HPD is going high here based on your above comment, thus probably the FPGA isn't servicing this and continuing on with link training. 

    Regards 

    Logan