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DS90UB983-Q1: Configuration of sst+superframe

Part Number: DS90UB983-Q1

Tool/software:

Hi,

      We are now encountering some problems, need to debug dp dual-screen heterodyne, the serdes used is ti983 --> ti948, the original configuration is mst way, because the platform does not support mst, so we want to use sst+superframe way, through the reading of msa and other related registers to read to the front end of the dp signals are normal, but our own configuration by scripting But the configuration we generated through the script is not ideal, there is no display, you can play serdes-pattern, but this pattern is the same as the display, sst+superframe, if you need to use the Splitter mode, if so, we generated in accordance with the script configuration file does not have the setting of the splinter, please help to generate the sst+superframe configuration, please help to generate a sst+superframe configuration. superframe configuration, timing and block diagram as below, thanks!

#THW = Horizontal Total Pixels = AHW + HBP + HFP + HSW     --------     2052

# TVW = Vertical Total Lines = AVW + VBP + VFP + VSW            --------     761

# AHW = Hoizontal Active Pixels                                                     --------     1920

# AVW = Vertical Active Lines                                                          --------     720

# HBP = Horizontal Back Porch Pixels                                             --------     32

# VBP = Vertical Back Porch Pixels                                                  --------     6

# HFP = Horizontal Back Porch Pixels                                             --------     72

# VFP = Vertical Back Porch Pixels                                                  --------     30

# HSW = Horizontal Sync Width Pixels                                           --------     28

# VSW = Vertical Sync Width Lines                                                 --------     5

# HSP = Horizontal Sync Polarity: 0 = Positive, 1 = Negative      --------      1

# VSP = Vertical Sync Polarity: 0 = Positive, 1 = Negative           --------      1

# PCLK = Pixel Clock Rate in MHz                                                    --------     93.70MHz

# Bits_per_pixel = 18, 24, or 30 (30bpp only available for FPD IV) ------ 24

  • Hello,

    I have sent you a connect friend request to allow for direct messages. I would like to move this discussion to direct messages / email as sensitive information about the system may be requested to review.

    if so, we generated in accordance with the script configuration file does not have the setting of the splinter, please help to generate the sst+superframe configuration

    Can you please share the User Config file or initialization script used for this system either in the direct message or via email (m-bolante@ti.com) so that I may review the existing configurations?

    Thanks,

    Miguel

  • We've emailed you to help check it out thanks!

  • Hi,

    Would you please accept my friend request here in E2E and I can address this information in direct messages?

    It appears email correspondence is not coming through, I have also sent an email out on 7/29/2024 but it may not have been received.

    Thanks,

    Miguel