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TL16C552 Question

Paul Joseph
Expert 2795 points
My project uses TL 16C552 peripheral chip to work with the RS232 serial connection.
 
I have problem with setting of 1.5 Stop bit combined with 5 Data bit. Acutally these settings have to work together.
 
When connected with the Hyperterminal (Windows XP) at COM1 port, "garbage" characters are picked up and displayed.
 
However this work perfect with other combined settings of 7/8 Data Bits and 1/2 Stop bits.
 
To my understanding, these settings are configured in the least significant 3 bits of LCR register.
 
I have checked that when it is configured for 5 Data and 1.5 Stop at runtime, the value in the LCR is 0x04.
 
For all the tesings, I use 9.6 baud, No Parity, No Hardware Control.
 
Please advise
  • 0
    TI__Expert 5230 points

    Hi Paul,

    LCR = 0x04 is the correct setting for 5 data bits, 1.5 stop bits and no parity bit. Can you provide the settings for the other 552 registers?

    What crystal frequency are you using in your application?

    I will check the archives. I have not seen a previous report of this issue.

  • 0 in reply to Joe Fockler
    Expert 2795 points

    Joe:

     

    LCR        0x04
    FCR        0x02
    MCR        0x04 
    DLL        0x00 
    DLM        0x00
    IER        0x01  
    The crystal frequency is 7.3728Mhz.
    Thank you.
  • 0 in reply to Paul Joseph
    TI__Guru 71526 points

    Hyperterminal settings, too, would be helpful.  Screen capture of settings, perhaps.

    -Leonard

     

  • 0 in reply to LeonardEllis
    TI__Expert 5230 points

    Thank you, Leonard. As you noted, the HyperTerminal or TerraTerm window settings would be helpful to have.

    Paul, the FCR register is showing a value of 0x02. If you are reading this value it is from the IIR register and is showing Interrupt ID1 is set. To reset the FIFO's and enable them a value of 0x07 should be written to FCR.

    Best Regards,

    Joe

  • 0 in reply to Joe Fockler
    Expert 2795 points
    The same registers configurations work perfect with stop bit 1 or 2 in combinations with 7 or 8 data bits.
    So there is nothing wrong with the FCR, etc.
     
    Will you please set it up and verify the 1.5 stop bit and 5 data bit?
     
     
    The HyperTerminal settings is:
     
    BPS: 9600
    Data Bits: 5
    Parity: None
    Stop Bits: 1.5
    FLow Control: None
  • 0 in reply to Joe Fockler
    TI__Guru 71526 points

    Should FCR first be written as 0x07, then immediately to 0x01?  Otherwise the RX and TX FIFOs are held RESET, is that correct?  Of course, if this was a problem, I would expect the same with an 8-bit setting.

    Wondering what would happen if a slower baud rate was used?   Paul, can you ask Danny to try running at 1.2kbaud?

     

  • 0 in reply to LeonardEllis
    TI__Expert 5230 points

    Leonard,

    Since other character lengths work fine, as Paul noted, the FIFO's are working as expected. This is an older device and I am trying to locate the bench board to test the failing scenario. It might take a couple of days to search the hardware archive. I may also need to order the 7 MHz crystal if I am unable to reproduce the problem with the and standard 1.8432 MHz and 3.686 MHz crystals.

    Best Regards,

    Joe