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DP83867E: DP83867E Configuration

Part Number: DP83867E

Tool/software:

My current circuit board has a DP83867E, 10-100-1000 Ethernet PHY which is controlled by an AMD MicroBlaze processor (embedded in an FPGA). I am working on developing a power-up, self-checking built-in test for the circuit board. So far, I can configure the PHY and put it in internal loopback mode (by writing 0x6100 to the Basic Mode Control Register at address 0x0000) and verify that the transmit and receive packets are identical. This is good enough (for now) as far as checking the PHY goes.

What I try to do next, is to bring the PHY out of loopback mode (by writing 0x2100 to the Basic Mode Control Register) and continue with testing other functions of the circuit board. The problem is the second write to the Basic Mode Control Register causes my baremetal MicroBlaze code to hang (as if the MDIO write function gets stuck in a loop waiting for the MDIO interface to become available). I tried reseting the chip before rewriting the Basic Mode Control Register, but it didn't make any difference.

My question is whether there is a trick to changing the value in the Basic Mode Control Register. Is there more to it than just an MDIO write? I tried to wait for a few seconds for the second write to the Basic Mode Control Register to go through but that did not make any difference either.

I appreciate any help anyone may provide.

 

  • Hi Morris,

    Can you send me the script on how you configure the BIST and loopback?

    --

    Thank you,

    Hillman Lin

  • Hi Hillman,

    My code is all baremetal MicroBlaze (Xilinx) code. I have MIDO_read and MDIO_write functions. In order to perform a loopback test, I do the following:

    1- Read PHY ID Register 2 to verify that the MDIO interface is up and running. It reads 0xA231 which is the correct value.

    2- Configure the PHY: Internal loopback, 100 Mbps, no auto-negotiation, full-duplex: MDIO_write 0x6100 to Basic Mode Control Register (address 0x00).

    3- I transmit one packet and receive it properly. This works properly even with an external loopback at RJ45 connector (and BMCR = 0x2100)

    4- I try to bring the PHY out of loopback mode: MDIO_write 0x2100 to Basic Mode Control Register.

    ... and this is where it gets hung up, as if a second write to the Basic Mode Control Register messes up the MDIO interface. Please let me know if you have any other questions. Thanks,

    Morris

  • P.S. None of the chip's configuration pins are strapped (on the circuit board.

  • Hi Morris,

    Thank you for sharing the information.

    I think I have a better picture now. Please correct me if my understanding is wrong.

    • Currently, you are able to see communication on SoC side when you enable MII loopback through register 0x0000
    • After you disable MII loopback you are not able to see a communication

    If my understanding is correct, here is the following test setup I would like to check:

    • What is the current setup that you have? What is the link partner and cable length you are using? A block diagram would be helpful
    • If possible, could you also check without and communication, are you able to see a link up?
    • Could you also provide a register log from register 0x0000 to 0x001F without loopback condition?

    --

    Regards,

    Hillman Lin

  • Hi Hillman,

    I found out what was wrong:

    I was configuring an AXI-Stream FIFO, TEMAC IP core and the DP83867E (through the TEMAC), in that order. The configuration of the AXI-Stream FIFO includes a full reset which in turn resets the TEMAC (I was not aware of TEMAC getting reset by the AXI-Stream FIFO). Yesterday I rearranged my code a little bit and the configuration of the AXI-Stream FIFO got moved to after configuration of the TEMAC and doing a loopback. After the loopback was done, configuration of the AXI-Stream FIFO would reset the TEMAC and stop the MDIO clock, killing the MDIO interface and making it impossible to bring the DP83867E out of loopback mode. I moved the configuration of the AXI-Stream FIFO back to before configuration of the TEMAC and the problem went away. Thanks for looking into this.

    Morris

  • Hi Hillman,

    Looks like I spoke too soon. The MDIO interface does not get hung up anymore, but still, when I try to bring the chip out of loopback mode, by writing 0x2100 to Basic Mode Control Register (address 0x00), the value of the register does not change. It still shows 0x6100. Please advise. Thanks,

    Morris

  • I don't use indirect addressing. Register content after writing 0x6100 to Basic Mode Control Register (address 0x00) is:

    Register | Content

     0x0000 : 6100
     0x0001 : 7949
     0x0002 : 2000
     0x0003 : A231
     0x0004 : 01E1
     0x0005 : 0000
     0x0006 : 0064
     0x0007 : 2001
     0x0008 : 0000
     0x0009 : 0300
     0x000A : 0000

     0x000D : 0000
     0x000E : 0000
     0x000F : 3000
     0x0010 : 5048
     0x0011 : 6B02
     0x0012 : 0000
     0x0013 : 0040
     0x0014 : 29C7
     0x0015 : 0000
     0x0016 : 0000
     0x0017 : 0040
     0x0018 : 6150
     0x0019 : 4444
     0x001A : 0002

     0x001E: 0002
     0x001F: 0000

  • Hi Morris,

    If you configure 0x0000 to 3100, does it still give you 6100 on register 0x0000.

    May I ask what how did you configure the registers? Is your software somehow over written every time you try to configure registers?

    If you write register 0x0004 to 0181, are you still seeing 01E1 or 0181?

    --
    Regards,

    Hillman Lin

  • Hi Hillman,

    Your hunch was correct. I had an uninitialized variable in my MDIO_Write function. Once I initialized it at the declaration, the problem went away. Thanks,

    Morris