Tool/software:
My current circuit board has a DP83867E, 10-100-1000 Ethernet PHY which is controlled by an AMD MicroBlaze processor (embedded in an FPGA). I am working on developing a power-up, self-checking built-in test for the circuit board. So far, I can configure the PHY and put it in internal loopback mode (by writing 0x6100 to the Basic Mode Control Register at address 0x0000) and verify that the transmit and receive packets are identical. This is good enough (for now) as far as checking the PHY goes.
What I try to do next, is to bring the PHY out of loopback mode (by writing 0x2100 to the Basic Mode Control Register) and continue with testing other functions of the circuit board. The problem is the second write to the Basic Mode Control Register causes my baremetal MicroBlaze code to hang (as if the MDIO write function gets stuck in a loop waiting for the MDIO interface to become available). I tried reseting the chip before rewriting the Basic Mode Control Register, but it didn't make any difference.
My question is whether there is a trick to changing the value in the Basic Mode Control Register. Is there more to it than just an MDIO write? I tried to wait for a few seconds for the second write to the Basic Mode Control Register to go through but that did not make any difference either.
I appreciate any help anyone may provide.