DP83TG720R-Q1: DP83TG720R-Q1

sanjone tu

Part Number: DP83TG720R-Q1

Tool/software:

question:The 0x63c register has a value of 0xDE, but the rx_ctrl pin is not raised and the rxd data line does not emit data； Shouldn't rx send data when it receives it ？What causes this problem？

Some register values are as follows：

Register 0542 is: 0022
Register 0543 is: 0024
Register 0544 is: 2320
Register 0545 is: 0029
Register 0546 is: 0020
Register 0547 is: 0400
Register 0548 is: 0001

The schematic diagram is as follows：

4 months ago

0 David Creger 4 months ago

TI__Mastermind 22221 points

Hello Sanjone,

Register 0x63C does not clear until 0x63C, 0x63D, 0x63E are read in sequence. Some packets may have been received in the past but data lines are not currently toggling. How are you sending packets? Please share a setup picture or block diagram.

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

Hello David:
1、How are you sending packets?
Set serverip and ipaddr, and run the ping command to PING each other;

For example:serverip is 192.168.2.16 ,ipaddr is 192.168.2.100, ping 192.168.2.16 and ping 192.168.2.100；
2、Please share a setup picture or block diagram.

3、phy chip register configuration value，following:

THANKS,

sanjone;

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

hello David:

Add one thing:Before sending the package,Register 0x63C is 0x0000,After sending the package,Register 0x63C is not zero;

0 David Creger 4 months ago in reply to sanjone tu

TI__Mastermind 22221 points

Hi Sanjone,

I understand the received packet counter is incrementing as expected, when you ping from Ubuntu PC to board with 720 PHY. Is the ping successful?

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

The received packets are not increased，A fixed number；ping is also failed;

0 David Creger 4 months ago in reply to sanjone tu

TI__Mastermind 22221 points

Hi Sanjone,

You mentioned that register 0x63C increments when sending the ping. Please read registers 0x639 - 0x63E in sequence and let me know the values before and after ping.

Please also read register 0x600, 0x602 and let me know the values.

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

1、register 0x600=0x0128, 0x602=0x03

2、before ping

0x639=0x0001

0x63a=0x0000

0x63b=0x0000

0x63c=0x0001

0x63d=0x0000

0x63e=0x0000

3、after ping

0x639=0x000A

0x63a=0x0000

0x63b=0x0000

0x63c=0x00C9

0x63d=0x0000

0x63e=0x0000

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

add one all register value before link up:

following files:v3h_reg_nolink_print_0821.txt

0 David Creger 4 months ago in reply to sanjone tu

TI__Mastermind 22221 points

Hi Sanjone,

I see that RX and TX packet counters are incrementing after ping. I am wondering about the RGMII timing. I see skew is enabled on RX and TX with the PHY, can you confirm that no skew is introduced by processor? Please share RX_D0, RX_CLK and TX_D0, TX_CLK waveforms to ensure that setup and hold times are met according to section 6.6 of datasheet.

Could you share the complete register dump while link is up and after ping has run?

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

all register value after link up and ping has run，following files:v3h_reg_link_print_0821.txt

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

rx_d0 is high along;

rx_clk is 125M,

tx_clk is also 125M,

tx_d0 is low along;

+1 David Creger 4 months ago in reply to sanjone tu

TI__Mastermind 22221 points

Hi Sanjone,

Can you please capture RX_D0 and RX_CLK together in one image? As well as another capture with TX_D0 and TX_CLK. You will need to send data in order to have the data lines toggling. I would like to see a picture as in Figure 6-4 of the datasheet, in order to check the setup and hold times.

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

Hi David,

Change the resistance RX_D2 and RX_D1 value from 2.49k to 2.3k，then the network is ok;I wonder that this resistance change makes any difference? The strap config is same;

Thanks

sanjone

+1 David Creger 4 months ago in reply to sanjone tu

TI__Mastermind 22221 points

Hi Sanjone,

You are saying that changing the value of R220 and R235 to 2.3kohm resolved the issue? I find that surprising but it may point to a timing issue, where increasing pull strength resolves the marginality.

Can you please provide the scope shots as requested above? I would like to see the setup and hold times of the RGMII signals.

You may try adjusting the delays in register 0x430 to see if this resolves the issue as well.

Thanks,

David

0 sanjone tu 4 months ago in reply to David Creger

Prodigy 20 points

1、 the scope shots are above,nothing;

2、I try adjusting the delays in register 0x430,also noting;

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DP83TG720R-Q1: DP83TG720R-Q1