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ONET1130EC: How long time does it take to finish one signal sample for ONET1130EC ADC

Hale Tan
Expert 3020 points
Part Number: ONET1130EC
Other Parts Discussed in Thread: ONET1131EC

Tool/software:

Hi team,

Below is the register of ONET1130EC and as you see there are different signal which can be sampled by ADC. If the customer use IMONB as ADC input signal firstly, then they want to switch to IMONP as ADC input signal. How long time does it take to finish IMONB signal sample for ONET1130EC, then to switch to signal IMONP?

  • 0
    TI__Guru* 93570 points

    Hi Hale,

    Reading IMONB in the case you mentioned, is limited by 10-bits I2C register read cycles. There are two register reads and each register read can take 39 bits. Therefor it takes 2 X 39 X I2C clock rate. 

    Regards, Nasser 

  • 0 in reply to Nasser Mohammadi
    TI__Expert 3020 points

    Nasser,

    Thanks for your input. So for 50kHz I2C，it should be 2X39X1/50KHz=1.56ms. Is that right? Does it has relationship to I2C conversion time?

  • 0 in reply to Hale Tan
    TI__Expert 3020 points

    Sorry for the mistake. I want to say,

    So for 50kHz I2C，it should be 2X39X1/50KHz=1.56ms. Is that right? Does it has relationship to ADC conversion time?

  • 0 in reply to Hale Tan
    TI__Guru* 93570 points

    Hi Hale,

    Yes within this time we should be able to read ADC content.

    Regards, Nasser

  • 0 in reply to Nasser Mohammadi
    TI__Expert 3020 points

    Nasser,

    The I2C frequency is the frequency at which the MCU accesses the Driver, how does this relate to ADC conversion? If we had an I2C frequency of 400Khz, would that mean that ADC conversion would be faster? What is the correlation between ADC conversion and the frequency with which our MCUs access I2C? 

  • 0 in reply to Hale Tan
    TI__Guru* 93570 points

    Hi Hale,

    Note register 3 of the ONET1130EC device. Once ADC is enabled(bits 7&6), it constantly reads the selected input and updates ADC register 40 and 41 values. Then reading these register values depends on the I2C clock rate. 

    If the ADC selection is changed(bits 2:0), then within 5ms the new value for the new selected channel will be available in register 40 and 41. Again we need to read ADC reg 40 and 41 to read the new channel  value.

    Regards, Nasser

  • 0 in reply to Nasser Mohammadi
    TI__Expert 3020 points

    Nasser,

    But this device can support different I2C data speed, such as 50kHz, 400Khz? Do you mean that we can tell the ADC conversion time by max I2C data speed, such as 400Khz? Does 39bit refer to the timing of the access to 2 registers? Do the 2 readable registers need to be accessed one at a time? However, starting+dev+reg+restart+data+stop, with two accesses, has about 30 clocks
    60 clocks for 2 registers? Is the same situation as ONET1131EC? 

    If so, the 1131 does not have ADC conversion commands, what is the principle of delay required to select channel to read ADC?

  • 0 in reply to Hale Tan
    TI__Guru**** 154921 points

    Hi Hale,

    Due to the US Labor Day holiday, the response to your question may be delayed. We will look into your question when we return tomorrow, Sept 3rd. Sorry for the wait and any inconvenience it may cause.

    Thanks,

    David

  • 0 in reply to David (ASIC) Liu
    TI__Guru* 93570 points

    Hi Hale,

    Please refer to the earlier response. We need to read two registers and therefor it takes two I2C register reads. Since this depends on the reading two registers therefor I2C clock rate makes a difference. Note when ADC is enabled and it is running in the background. Please note data sheet read sequence below. There are 39 bits. Why do you say 30 bits?

    Regards, Nasser