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Original question:

TCAN4550-Q1: Multiple TCAN4550-Q1 connected to single SPI

TCAN4550-Q1: This device doesn't report in some cases

Jack Li
Intellectual 2360 points
Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

Tool/software:

Hi Expert,

My customer meet with some questions when they are using the TCAN4550-Q1, please help to answer, thanks in advance
They put 8-byte receive packets in RX0, and more than 8-byte receive packets in RX1, and the diagnostic message is 64 bytes, which is in the RX1.
1. They emulate a few 8-byte packets on CANoe, and then a long packet with a frame cycle of 40ms RX1;
2. Then they send and receive the CAN diagnostic message and find that the response is getting slower and slower, they wonder the reason why TCAN4550-Q1 gets slower and slower;
3. Then they tested and found that if in this case, the long message of 40ms was stopped, the diagnostic message TCAN4550 was no longer reported. It is another issue to resume the transmission of long messages and the diagnostic messages that were not reported will be reported together
The configuration space is less than 2K, and now the configuration is how many packets are allocated in Rx0 and Rx1.

Best Regards,

Jack

  • 0
    TI__Mastermind 33030 points

    Hi Jack,

    I'm not sure I fully understand.

    Jack Li said:
    They put 8-byte receive packets in RX0, and more than 8-byte receive packets in RX1, and the diagnostic message is 64 bytes, which is in the RX1.

    What are you specifically referring to by "RX0" and "RX1"?  Are you referring to RX FIFO 0 and RX FIFO 1, or are you referring to RX Buffer element 0 and RX Buffer element 1, etc.?

    Jack Li said:
    2. Then they send and receive the CAN diagnostic message and find that the response is getting slower and slower, they wonder the reason why TCAN4550-Q1 gets slower and slower;

    What do they mean by the response gets slower and slower?  Between what events are they measuring?  Are they measuring from the time the MCU connected to the TCAN4550 writes the TXBAR register to send a response and the time the message is actually transmitted on the CAN bus?  Or is it between when a message is transmitted from CANoe and a response message is received back to CANoe from the TCAN4550?

    Please clarify and provide specific time examples, or scope plots, etc. because "slower and slower" is a relative term and I don't know what you are referring to or expecting.

    Can they isolate the time between when the MCU writes to the TXBAR register in the TXAN4550 which initiates the response transmission and when the message is seen on the CAN bus? The delay they are seeing may be from the MCU and not the TCAN4550's CAN controller.

    Jack Li said:
    3. Then they tested and found that if in this case, the long message of 40ms was stopped, the diagnostic message TCAN4550 was no longer reported. It is another issue to resume the transmission of long messages and the diagnostic messages that were not reported will be reported together

    I don't understand what you mean by "the long message of 40ms was stopped, the diagnostic message TCAN4550 was no longer reported."  Is this a message being transmitted to the TCAN4550, and if so, why is it being stopped? 

    Or is this a response message from the TCAN4550 that appears to be getting stopped and the full message fails to transmit?  If it is this second case, does the message appear to resume transmission after a period of time?

    If messages are having transmission errors and appear to be interrupted, this may point to a clock related issue and their crystal clock circuit may need to be optimized.  Please refer to the TCAN455x Clock Optimization and Design Guidelines Application Report (Link) for more information.

    Jack Li said:
    The configuration space is less than 2K, and now the configuration is how many packets are allocated in Rx0 and Rx1.

    How many packets are they trying to store?

    Can you also please provide the complete register configuration for the TCAN4550?  Have them read all of the registers back and provide a list of the final device registers after their configuration sequence has completed.  Please don't provide firmware code, I just want to verify the final register values of the device itself.

    Regards,

    Jonathan

  • 0
    Prodigy 10 points

    hi,expert:

    The time we measured is the CANoe log time beatween Diag req message and Diag resp message. After the system power on, we found at the beginning, this time gap is about 5-10ms, with several 8 byte app msg which cfg received in RX0 and one 64 byte app msg which cfg received in RX1 simulated on the CANoe. With time goes by, the time gap comes to over 500ms.Preliminary assessment shows that time was spent on receiving diagnostic messages.
    Then comes to the other problem, when the gap comes to 500ms, we speculate that it may be the 64 byte msg simulated on CANoe caused this delay. So, we stop sending this msg, and test Diag msg again, we found that there is no Diag msg report from TCAN4550 at all. Then we continue send the 64 byte msg on the CANoe, and stop sending Diag msg, the message that was not reported earlier has been reported.

    Later,I will try to get the final register values of the device after Can_init fun.

  • 0 in reply to ?? ?
    TI__Mastermind 33030 points

    The timing is largely a function of the MCU and also the SPI timing.  It is important to determine the total time needed by your MCU to detect a new message has been received by the TCAN4550, read this message and acknowledge it through SPI, then load a response message into a TX buffer and then set the TXBAR bit to send it. 

    If messages are not being received, there may be an issue with the SID and XID Filters you are using, the RX FIFO or buffers are all full causing the message not to be stored, or an error on the CAN bus could have occurred. 

    Please also monitor the various Interrupt, Status, and Interrupt registers during your testing for errors or status bits that may indicate the reason for missing messages, etc.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 50 points

    Hi Jonathan,

    The values of all registers in TCAN4550 have been printed during initialization and when problems occur. Please check the attachment.

    Best Regards,
    6318.log.zip
    Kerry

  • 0 in reply to haoran shen
    TI__Mastermind 33030 points

    Hi Kerry,

    The status registers are showing the the RX FIFOs are Full and messages are getting lost.  This generally means that you are sending messages to the TCAN4550 faster than the MCU can read and acknowledge the RX messages in the TCAN4550 to free up the element for a new message. 

    I generally understand you are sending a specific message and are waiting for a specific response.  If the RX FIFOs are full and messages are either being blocked or overwritten (RX FIFO 0 is set for Overwrite mode, and RX FIFO 1 is set to Blocking mode), then the MCU will not be able to read and respond appropriately.

    You will either need to slow down the rate at which you transmit messages to the TCAN4550, or increase the speed and efficiency at which the MCU can read and process the messages through the SPI bus.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 50 points

    Hi Jonathan,

    Thanks for your answer. Now we have encountered another problem and need your help.
    We are currently testing the busoff function of the tcan 4550. The testing requirements are that the bus_off fast recovery time should be 30ms, and the slow recovery time should be 200ms. During actual testing, it was found that there was a delay of approximately 66ms when receiving 'BO: Bus_off status changed', resulting in a fast recovery time of 96ms (30ms+66ms) and a slow recovery time of 266ms (30ms+66ms). May I ask why there is a delay of 66ms in reporting BusOff? Note: When we conduct simulation testing, if we report Bus_off in a timely manner, we can meet the time requirements of 30 and 200ms.
    The attachment contains screenshots of the busoff log and code.
    BusOff Log.zip


    Best Regards,

    Kerry

  • 0 in reply to haoran shen
    TI__Mastermind 33030 points

    Hi Kerry,

    There is not an internal delay in setting the BO status and interrupt bits.  The delay you are seeing must be coming from the time needed by your system to respond to the interrupt condition.

    I'm not sure how you are detecting the interrupt condition, but using a hardware interrupt usually provides a faster response time than a software interrupt method that periodically reads the interrupt registers.  The TCAN4550-Q1 has three pins that can be used for hardware interrupts.  The nINT pin is the global interrupt pin, and GPIO1 and GPO2 can be configured for specific MCAN interrupt bits.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 50 points

    Hi Jonathan,

    We tested the BusOff function again and found that calling Init_CAN() took up too much time, approximately 62ms. The Init_CAN() function is used to initialize TCAN4550 and includes the following functions:
        TCAN4550_SetConfiguration();
        TCAN4550_Start();
    If we don't call Init_CN() during testing, we won't be able to send messages properly after fast recovery. Is there any other way to recover sending messages normally without calling Init_CAN()?
    Code screenshot.zip

    Best Regards,

    Kerry

  • 0 in reply to haoran shen
    TI__Mastermind 33030 points

    Hi Kerry,

    The Init_CAN() function is used to completely configure all of the registers and MRAM elements which requires a lot of SPI transactions.  This should only be needed after the device is initially Powered On, after a Reset, or after the device has been woken up from Sleep Mode. 

    The device will not lose it's register configuration simply because of a Bus Off condition, so unless you are resetting the device as part of your Bus Off recovery sequence, you should not need to re-initialize all of the device registers.

    When either the REC or TEC error counter exceeds the max limit of 255, the device will clear the INIT bit in the MCAN Control Register (0x1018[0]) to prevent the device from communicating on the CAN bus.  This also sets the TCAN4550 back into Standby Mode.  Placing the device back into Normal mode should automatically reset the INIT bit to 1 allowing it to have access to the CAN bus.  Once this happens the device will start to see CAN messages and the error counters should start to drop based on the CAN protocol and the device will have complete the recovery after seeing 128 messages.  The time needed to reduce the error counters sufficiently will vary with the amount of CAN messages on the bus.

    There is no way to reset the Error Counters to zero without a full device reset, which would in turn require the device to be reconfigured through the INIT_CAN() function.

    Here is an app note by Bosch on the M_CAN Buss Off Recovery Handling (Link).

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 50 points

    Hi Jonathan,


    Does busoff support self recovery function?
    Also, if batch configuration of registers is supported?

    Best Regards,

    Kerry

  • 0 in reply to haoran shen
    TI__Mastermind 33030 points

    Hi Kerry,

    The MCAN controller IP does not self-recover from a BO condition and requires the MCU to reset the INIT bit through the register stack.  So once the MCU is responsible for detecting the BO condition and initiating the recovery.

    The TCAN4550 SPI interface supports multiple consecutive register configuration using the Length byte in the SPI header word that contains the starting address for the first register (or MRAM memory location).  Each register contains a single 32-bit "word" of data, and so a single register write would have the Length field set to "1" and then 32-bits of data will follow the header word which is also 32-bits.  This makes the total number of bits for a single register write to be 64-bits.

    Multiple consecutive registers can be written with only a single 32-bit header word to reduce the overall number of bits transferred through SPI by eliminating a header word for each register that needs to be written.  The datasheet figures illustrate a 2 register write with the Length field set to "2".

    In this fashion, a batch register configuration could be possible and reduce the excess header words and idle times between SPI transactions that come from pulling the chip select line high and then low again between writes.

    The only consideration is that the data written must be in consecutive registers or memory.  If there is a gap, or registers that are not going to be written, then you will need to stop and start a new transaction.

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Prodigy 50 points

    Hi Jonathan,


    We have printed out the register values during initialization and when problems occur, as well as the 2K interval starting from REG_SRAM. Please refer to the attached log. When the problem occurred, both the register and the 2K interval became CAN message '03 22 F1 86'.

    Best Regards,

    Kerry

    Fullscreen REG_MRAM Info.txt Download 
    1. Register value after initialization：
[print_register_value:809] REG_SPI_DEVICE_ID0 (0x0000): 0x4E414354
[print_register_value:809] REG_SPI_DEVICE_ID1 (0x0004): 0x30353534
[print_register_value:809] REG_SPI_REVISION (0x0008): 0x00110201
[print_register_value:809] REG_SPI_STATUS (0x000C): 0x00000008
[print_register_value:809] REG_SPI_ERROR_STATUS_MASK (0x0010): 0x00000000
[print_register_value:809] REG_DEV_MODES_AND_PINS (0x0800): 0xC80004A2
[print_register_value:809] REG_DEV_TIMESTAMP_PRESCALER (0x0804): 0x00000002
[print_register_value:809] REG_DEV_TEST_REGISTERS (0x0808): 0x00000000
[print_register_value:809] REG_DEV_IR (0x0820): 0x00000000
[print_register_value:809] REG_DEV_IE (0x0830): 0x809628FF
[print_register_value:809] REG_MCAN_CREL (0x1000): 0x32150320
[print_register_value:809] REG_MCAN_ENDN (0x1004): 0x87654321
[print_register_value:809] REG_MCAN_CUST (0x1008): 0x00000000
[print_register_value:809] REG_MCAN_DBTP (0x100C): 0x00800E33
[print_register_value:809] REG_MCAN_TEST (0x1010): 0x00000080
[print_register_value:809] REG_MCAN_RWD (0x1014): 0x00000000
[print_register_value:809] REG_MCAN_CCCR (0x1018): 0x00000300
[print_register_value:809] REG_MCAN_NBTP (0x101C): 0x0E011E07
[print_register_value:809] REG_MCAN_TSCC (0x1020): 0x00000002
[print_register_value:809] REG_MCAN_TSCV (0x1024): 0x00005AEA
[print_register_value:809] REG_MCAN_TOCC (0x1028): 0xFFFF0000
[print_register_value:809] REG_MCAN_TOCV (0x102C): 0x0000FFFF
[print_register_value:809] REG_MCAN_ECR (0x1040): 0x00000000
[print_register_value:809] REG_MCAN_PSR (0x1044): 0x0014000F
[print_register_value:809] REG_MCAN_TDCR (0x1048): 0x00000F00
[print_register_value:809] REG_MCAN_IR (0x1050): 0x00010000
[print_register_value:809] REG_MCAN_IE (0x1054): 0x02000211
[print_register_value:809] REG_MCAN_ILS (0x1058): 0x00000000
[print_register_value:809] REG_MCAN_ILE (0x105C): 0x00000001
[print_register_value:809] REG_MCAN_GFC (0x1080): 0x0000002B
[print_register_value:809] REG_MCAN_SIDFC (0x1084): 0x000D0000
[print_register_value:809] REG_MCAN_XIDFC (0x1088): 0x00000000
[print_register_value:809] REG_MCAN_XIDAM (0x1090): 0x1FFFFFFF
[print_register_value:809] REG_MCAN_HPMS (0x1094): 0x00000000
[print_register_value:809] REG_MCAN_NDAT1 (0x1098): 0x00000000
[print_register_value:809] REG_MCAN_NDAT2 (0x109C): 0x00000000
[print_register_value:809] REG_MCAN_RXF0C (0x10A0): 0x80050034
[print_register_value:809] REG_MCAN_RXF0S (0x10A4): 0x00000000
[print_register_value:809] REG_MCAN_RXF0A (0x10A8): 0x00000000
[print_register_value:809] REG_MCAN_RXBC (0x10AC): 0x00000000
[print_register_value:809] REG_MCAN_RXF1C (0x10B0): 0x00080084
[print_register_value:809] REG_MCAN_RXF1S (0x10B4): 0x00000000
[print_register_value:809] REG_MCAN_RXF1A (0x10B8): 0x00000000
[print_register_value:809] REG_MCAN_RXESC (0x10BC): 0x00000770
[print_register_value:809] REG_MCAN_TXBC (0x10C0): 0x460002C4
[print_register_value:809] REG_MCAN_TXFQS (0x10C4): 0x00000000
[print_register_value:809] REG_MCAN_TXESC (0x10C8): 0x00000007
[print_register_value:809] REG_MCAN_TXBRP (0x10CC): 0x00000000
[print_register_value:809] REG_MCAN_TXBAR (0x10D0): 0x00000000
[print_register_value:809] REG_MCAN_TXBCR (0x10D4): 0x00000000
[print_register_value:809] REG_MCAN_TXBTO (0x10D8): 0x00000007
[print_register_value:809] REG_MCAN_TXBCF (0x10DC): 0x00000000
[print_register_value:809] REG_MCAN_TXBTIE (0x10E0): 0xFFFFFFFF
[print_register_value:809] REG_MCAN_TXBCIE (0x10E4): 0x00000000
[print_register_value:809] REG_MCAN_TXEFC (0x10F0): 0x00000000
[print_register_value:809] REG_MCAN_TXEFS (0x10F4): 0x00000000
[print_register_value:809] REG_MCAN_TXEFA (0x10F8): 0x00000000

2. After initialization, the contents of the 2K bytes starting from REG_SRAM are as follows, with 64 bytes printed per line:
[print_register_value_1:825]FF 07 A9 88 FF 07 17 89 FF 07 2B 8A FF 07 53 8B FF 07 A5 8B FF 07 24 92 FF 07 55 97 FF 07 DF 97 FF 07 99 90 FF 07 9A 90 FF 07 9B 90 FF 07 9C 90 FF 07 9D 90 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 B8 0C 00 00 3F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 FC 0C 00 00 3A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0C 0D 00 00 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825]00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.


3. The content of the 2K bytes starting from REG_SRAM when a problem occurs is as follows, with 64 bytes printed per line:

[print_register_value:809] REG_SPI_DEVICE_ID0 (0x0000): 0x86F12203
[print_register_value:809] REG_SPI_DEVICE_ID1 (0x0004): 0x86F12203
[print_register_value:809] REG_SPI_REVISION (0x0008): 0x86F12203
[print_register_value:809] REG_SPI_STATUS (0x000C): 0x86F12203
[print_register_value:809] REG_SPI_ERROR_STATUS_MASK (0x0010): 0x86F12203
[print_register_value:809] REG_DEV_MODES_AND_PINS (0x0800): 0x86F12203
[print_register_value:809] REG_DEV_TIMESTAMP_PRESCALER (0x0804): 0x86F12203
[print_register_value:809] REG_DEV_TEST_REGISTERS (0x0808): 0x86F12203
[print_register_value:809] REG_DEV_IR (0x0820): 0x86F12203
[print_register_value:809] REG_DEV_IE (0x0830): 0x86F12203
[print_register_value:809] REG_MCAN_CREL (0x1000): 0x86F12203
[print_register_value:809] REG_MCAN_ENDN (0x1004): 0x86F12203
[print_register_value:809] REG_MCAN_CUST (0x1008): 0x86F12203
[print_register_value:809] REG_MCAN_DBTP (0x100C): 0x86F12203
[print_register_value:809] REG_MCAN_TEST (0x1010): 0x86F12203
[print_register_value:809] REG_MCAN_RWD (0x1014): 0x86F12203
[print_register_value:809] REG_MCAN_CCCR (0x1018): 0x86F12203
[print_register_value:809] REG_MCAN_NBTP (0x101C): 0x86F12203
[print_register_value:809] REG_MCAN_TSCC (0x1020): 0x86F12203
[print_register_value:809] REG_MCAN_TSCV (0x1024): 0x86F12203
[print_register_value:809] REG_MCAN_TOCC (0x1028): 0x86F12203
[print_register_value:809] REG_MCAN_TOCV (0x102C): 0x86F12203
[print_register_value:809] REG_MCAN_ECR (0x1040): 0x86F12203
[print_register_value:809] REG_MCAN_PSR (0x1044): 0x86F12203
[print_register_value:809] REG_MCAN_TDCR (0x1048): 0x86F12203
[print_register_value:809] REG_MCAN_IR (0x1050): 0x86F12203
[print_register_value:809] REG_MCAN_IE (0x1054): 0x86F12203
[print_register_value:809] REG_MCAN_ILS (0x1058): 0x86F12203
[print_register_value:809] REG_MCAN_ILE (0x105C): 0x86F12203
[print_register_value:809] REG_MCAN_GFC (0x1080): 0x86F12203
[print_register_value:809] REG_MCAN_SIDFC (0x1084): 0x86F12203
[print_register_value:809] REG_MCAN_XIDFC (0x1088): 0x86F12203
[print_register_value:809] REG_MCAN_XIDAM (0x1090): 0x86F12203
[print_register_value:809] REG_MCAN_HPMS (0x1094): 0x86F12203
[print_register_value:809] REG_MCAN_NDAT1 (0x1098): 0x86F12203
[print_register_value:809] REG_MCAN_NDAT2 (0x109C): 0x86F12203
[print_register_value:809] REG_MCAN_RXF0C (0x10A0): 0x86F12203
[print_register_value:809] REG_MCAN_RXF0S (0x10A4): 0x86F12203
[print_register_value:809] REG_MCAN_RXF0A (0x10A8): 0x86F12203
[print_register_value:809] REG_MCAN_RXBC (0x10AC): 0x86F12203
[print_register_value:809] REG_MCAN_RXF1C (0x10B0): 0x86F12203
[print_register_value:809] REG_MCAN_RXF1S (0x10B4): 0x86F12203
[print_register_value:809] REG_MCAN_RXF1A (0x10B8): 0x86F12203
[print_register_value:809] REG_MCAN_RXESC (0x10BC): 0x86F12203
[print_register_value:809] REG_MCAN_TXBC (0x10C0): 0x86F12203
[print_register_value:809] REG_MCAN_TXFQS (0x10C4): 0x86F12203
[print_register_value:809] REG_MCAN_TXESC (0x10C8): 0x86F12203
[print_register_value:809] REG_MCAN_TXBRP (0x10CC): 0x86F12203
[print_register_value:809] REG_MCAN_TXBAR (0x10D0): 0x86F12203
[print_register_value:809] REG_MCAN_TXBCR (0x10D4): 0x86F12203
[print_register_value:809] REG_MCAN_TXBTO (0x10D8): 0x86F12203
[print_register_value:809] REG_MCAN_TXBCF (0x10DC): 0x86F12203
[print_register_value:809] REG_MCAN_TXBTIE (0x10E0): 0x86F12203
[print_register_value:809] REG_MCAN_TXBCIE (0x10E4): 0x86F12203
[print_register_value:809] REG_MCAN_TXEFC (0x10F0): 0x86F12203
[print_register_value:809] REG_MCAN_TXEFS (0x10F4): 0x86F12203
[print_register_value:809] REG_MCAN_TXEFA (0x10F8): 0x86F12203
[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

[print_register_value_1:825] Payload: 03 22 F1 86 AA AA AA AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00.

  • 0 in reply to haoran shen
    TI__Intellectual 2360 points

    Hi Jonathan,

    My customers do meet with many problems when bringing up, and we do need your strong support to help with them, could you please tell me what time you are free, maybe we need to set a meeting to talk about this issue, thanks!

    Best Regards,

    Jack

  • 0 in reply to haoran shen
    TI__Mastermind 33030 points

    Hi Kerry,

    I have reviewed the data log and the initialization register settings look OK.  I only saw one adjustment with the Transmit Delay Compensation that may need adjustment.  Currently it looks like you are targeting an 80% Sample Point, and the TDCO value will be targeting a 75% Secondary Sample Point for the FD data bits.  Also, you are setting the Transmit Delay Compensation Filter (TDCF) to 0x0 and usually it is recommended to set this to the same value as the TDCO value. 

    The TDCF value defines the "Minimum value of the SSP position" therefore a value of 0x0 will prevent a different SSP set by the TDCO value and this can lead to bit errors.

    You can find more information about the Transmit Delay Compensation in the M_CAN User's Manual (Link).

    However, the bigger issue is the registers and MRAM data always return the same value "when the problem occurs" and this is not expected.  I have not see this particular issue before with a TCAN4550, nor does the value of 0x86F12203 have significance to me.  The MRAM values do not have any significance to me either.

    Can you please verify the following when the problem occurs:

    - Voltage levels on the following pins: VSUP, VIO, VCCOUT, FLTR, RST, INH

    - Can the SPI signals be captured with a logic analyzer (nCS, SCLK, SDI-MOSI, SDO-MISO)?

    - Is the OSC1/2 clock (Cyrstal or Single-ended clock) functioning?

    - Do you have more than one TCAN4550 device to use for this test, and if so, does this issue occur on all TCAN4550's, or just a single TCAN4550 device?

    - Are you using a TCAN4550 board developed by TI and if so which one?  Or are you using a board of your own design and if so can you share the schematic for review? 

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    TI__Intellectual 2360 points

    Hi Jonathan,

    Appreciate for your kindly reply!

    Best Regards,

    Jack

  • 0 in reply to Jack Li
    TI__Mastermind 33030 points

    Hi Jack,

    I'll keep the thread open for now if you have any additional information to provide.  Otherwise please let us know if or when this issue has been resolved and it is ok to close the thread.

    Regards,

    Jonathan