DS90UB954-Q1EVM: 400Mbps vs 800 Mbps setting of indirect registers

Hi Michael,

Thank you for your question. To operate the CSI TX port at a speed of 800Mbps these register settings should not be needed. Setting register 0x1F[1:0] = 10 is all that is necessary, which is actually the default speed of the device. Simply enable CSI forwarding/output and the 954 will automatically output with a 800Mbps CSI TX speed. To operate the CSI TX port at a speed of 400Mbps set register 0x1F[1:0] = 11 and the "CSI Timing Parameters" register you've listed above.

Do you know how much blanking your camera requires? Depending on the blanking, with the 12bits per pixel the camera will have a bandwidth range of ~2Gbps to ~2.3Gbps. This likely won't be supported by a 400Mbps CSI TX speed. If 10 bits per pixel is used instead the range will be closer to ~1.6Gbps to ~ 1.9Gbps. This range is still a bit high for a 400Mbps CSI TX speed can support. Are you seeing any errors when operating with 400Mbps CSI TX speed? On the 954 you can check register 0x4E to see if any buffer errors are being reported on RX0. Registers 0x90-0x97 can also provide a quick glance at the status of data being output on the CSI TX port. If you are using a display/SoC there may be more visual or diagnostic tools available to evaluate if any data is being lost/corrupted.

Hi Darrah,

thanks for your comprehensive answer and the hint to observe errors.

In our setup, we have the DS90UB954-Q1EVM connected to our SoC and just try to display the test pattern. For 400 Mbps this works fine, using the respective scripts.

For 800Mbps, i.e. setting register 0x1F[1:0] = 10, I need to do this initialization in order to make the test pattern show up on the SoC:

# Set PLL Clock divider to 32
board.WriteReg(0xB0, (0x07 << 2))
board.WriteReg(0xB1, 0x0A)
board.WriteReg(0xB2, 0x80)

I did not find anything about the PLL clock divider in the datasheet. Can you tell me what these settings actually do?

Hi Michael,

If you aren't seeing any errors in your setup, then the blanking may be low enough that the lower CSI TX speed will work for your system. It would be recommend to still check some registers/diagnostics on the 954 and SoC to confirm there aren't any unexpected behaviors during operation since the camera is sending roughly 2Gbps of bandwidth. If the 954 is powered up and no CSI TX speed registers are configured do you not see any output? The device is designed to automatically output at 800Mbps, you only need to program registers 0x33[0] = 1 to enable CSI output and 0x20[4] = 0 to forward data from RX0. Do these register settings not produce any output on the CSI TX port? Some additional settings may be needed for your specific use case, but these register writes will enable output. Where did you find these "PLL Clock divider" settings? This script is setting an indirect reserved register, which should not be overwritten. 

Hi Darrah, 

which registers on the 954 can I check to see the configured blanking or other parameters of the MIPI output?

When I installed the Analog Launch Pad, there is a directory full of scripts for the 954:

C:\Program Files (x86)\Texas Instruments\Analog LaunchPAD v1.57.0010\PreDefScripts\DS90UB954

The script 954_400Mbps_CSI.py contains the configuration of the PLL clock divider that makes the test pattern appear when I select 800 Mbps:

# Set PLL Clock divider to 32
board.WriteReg(0xB0, (0x07 << 2))
board.WriteReg(0xB1, 0x0A)
board.WriteReg(0xB2, 0x80)

When the 954 is powered up, I execute the below script in order to configure the test pattern generator. Only with the 3 registers for the PLL clock dividier I get any output. When I comment these 3 lines out, there is no output.

board.WriteReg(0xB0, 0x02) # IA_AUTO_INC=1
board.WriteReg(0xB1, 0x01) # PGEN_CTL
board.WriteReg(0xB2, 0x00) # PGEN_DISABLE=0

# Enable 800Mbps CSI in UB954
#
# Version 0.91

# Set CSI_TX_SPEED to select 800Mbps
board.WriteReg(0x1F, 0x02)

# Set PLL Clock divider to 32
board.WriteReg(0xB0, (0x07 << 2))
board.WriteReg(0xB1, 0x0A)
board.WriteReg(0xB2, 0x80)

# CSI patgen
# Python script CSI_patgen_RAW8_1920x1080p30
# Version 0.91

# CSI cont clk and CSI enable
# board.WriteReg(0x32, 0x01)
board.WriteReg(0x33, 0x01)

board.WriteReg(0xB0, 0x02) # IA_AUTO_INC=1
board.WriteReg(0xB1, 0x01) # PGEN_CTL
board.WriteReg(0xB2, 0x01) # PGEN_ENABLE=1
board.WriteReg(0xB2, 0x35) # PGEN_CFG
board.WriteReg(0xB2, 0x2B) # PGEN_CSI_DI
board.WriteReg(0xB2, 0x09) # PGEN_LINE_SIZE1
board.WriteReg(0xB2, 0x60) # PGEN_LINE_SIZE0
board.WriteReg(0xB2, 0x01) # PGEN_BAR_SIZE1
board.WriteReg(0xB2, 0x2C) # PGEN_BAR_SIZE0
board.WriteReg(0xB2, 0x04) # PGEN_ACT_LPF1
board.WriteReg(0xB2, 0x38) # PGEN_ACT_LPF0
board.WriteReg(0xB2, 0x04) # PGEN_TOT_LPF1
board.WriteReg(0xB2, 0x65) # PGEN_TOT_LPF0
board.WriteReg(0xB2, 0x17) # PGEN_LINE_PD1
board.WriteReg(0xB2, 0x26) # PGEN_LINE_PD0
board.WriteReg(0xB2, 0x21) # PGEN_VBP
board.WriteReg(0xB2, 0x0A) # PGEN_VFP
board.WriteReg(0xB2, 0xFF) # PGEN_COLOR0
board.WriteReg(0xB2, 0x00) # PGEN_COLOR1
board.WriteReg(0xB2, 0xFF) # PGEN_COLOR2
board.WriteReg(0xB2, 0x00) # PGEN_COLOR3
board.WriteReg(0xB2, 0xFF) # PGEN_COLOR4
board.WriteReg(0xB2, 0x00) # PGEN_COLOR5
board.WriteReg(0xB2, 0xFF) # PGEN_COLOR6
board.WriteReg(0xB2, 0x00) # PGEN_COLOR7
board.WriteReg(0xB2, 0x00) # PGEN_COLOR8
board.WriteReg(0xB2, 0x00) # Reserved

Hi Michael,

For the pattern generator the blanking can be controlled by setting the total number of horizontal lines and vertical front/back porch (controlled in the indirect pattern generator registers 0x0A, 0x0B, 0x0E, 0x0F). However, for a camera data stream, blanking will be specific to the camera and can not be changed by the deserializer output port. Can you double check your SoC connections/programming? I used your pattern generator settings to test on an EVM and was able to see the pattern and confirmed the 800Mbps speed using a CSI analyzer. I've attached the script for reference, immediately after power up only the 0x33 register was written to enable CSI output and then the pattern generator configuration. No additional register writes were needed. Register 0x1F = 0x02 is the default value and does not need to be written, but even with it included in the script, I saw the same 800Mbps output.

import time

desAddr = 0x60

#board.WriteI2C(desAddr, 0x1F, 0x02) #default setting
board.WriteI2C(desAddr, 0x33, 0x01) #enable CSI output 

#program pattern generator
board.WriteI2C(desAddr, 0xB0, 0x02) # IA_AUTO_INC=1
board.WriteI2C(desAddr, 0xB1, 0x01) # PGEN_CTL
board.WriteI2C(desAddr, 0xB2, 0x01) # PGEN_ENABLE=1
board.WriteI2C(desAddr, 0xB2, 0x35) # PGEN_CFG
board.WriteI2C(desAddr, 0xB2, 0x2B) # PGEN_CSI_DI
board.WriteI2C(desAddr, 0xB2, 0x09) # PGEN_LINE_SIZE1
board.WriteI2C(desAddr, 0xB2, 0x60) # PGEN_LINE_SIZE0
board.WriteI2C(desAddr, 0xB2, 0x01) # PGEN_BAR_SIZE1
board.WriteI2C(desAddr, 0xB2, 0x2C) # PGEN_BAR_SIZE0
board.WriteI2C(desAddr, 0xB2, 0x04) # PGEN_ACT_LPF1
board.WriteI2C(desAddr, 0xB2, 0x38) # PGEN_ACT_LPF0
board.WriteI2C(desAddr, 0xB2, 0x04) # PGEN_TOT_LPF1
board.WriteI2C(desAddr, 0xB2, 0x65) # PGEN_TOT_LPF0
board.WriteI2C(desAddr, 0xB2, 0x17) # PGEN_LINE_PD1
board.WriteI2C(desAddr, 0xB2, 0x26) # PGEN_LINE_PD0
board.WriteI2C(desAddr, 0xB2, 0x21) # PGEN_VBP
board.WriteI2C(desAddr, 0xB2, 0x0A) # PGEN_VFP
board.WriteI2C(desAddr, 0xB2, 0xFF) # PGEN_COLOR0
board.WriteI2C(desAddr, 0xB2, 0x00) # PGEN_COLOR1
board.WriteI2C(desAddr, 0xB2, 0xFF) # PGEN_COLOR2
board.WriteI2C(desAddr, 0xB2, 0x00) # PGEN_COLOR3
board.WriteI2C(desAddr, 0xB2, 0xFF) # PGEN_COLOR4
board.WriteI2C(desAddr, 0xB2, 0x00) # PGEN_COLOR5
board.WriteI2C(desAddr, 0xB2, 0xFF) # PGEN_COLOR6
board.WriteI2C(desAddr, 0xB2, 0x00) # PGEN_COLOR7
board.WriteI2C(desAddr, 0xB2, 0x00) # PGEN_COLOR8
board.WriteI2C(desAddr, 0xB2, 0x00) # Reserved