Tool/software:
Hi,
Please advise on the following customer inquiry.
Question)
Is it possible to stop the video signal output of the retimer IC (SN65DP159) while the video signal is being input from the host to the retimer IC?
- Will the above operation be achieved by setting bit 0 (TMDS_OE) of register address 0x20h to "1"?
- Can we assume that DDC communication between the host and display remains possible even when bit 0 (TMDS_OE) of register address 0x20h is set to "1"?
Best regards,
Hiroshi
Hey Hiroshi,
Is it possible to stop the video signal output of the retimer IC (SN65DP159) while the video signal is being input from the host to the retimer IC?
Yes this can be done via the TMDS_OE bit, or the OE pin on the device.
- Can we assume that DDC communication between the host and display remains possible even when bit 0 (TMDS_OE) of register address 0x20h is set to "1"?
This depends on how the DDC block is setup.
In a DDC implementation as follows, the DDC would not be able to communicate:
If you are using the DP159 in snoop mode, then DDC would be communicating regardless of the status of the DP159.
Hi Vishesh-san,
Thank you for your reply.
Sorry for bothering you, but could you please explain a bit more about the answer below?
Q1
The customer says that he doesn't quite understand the diagram below.
Which part of the diagram below is the problem (reason) that prevents communication?
Q2
Also, I don't think the setting of bit 0 (TMDS_OE) at register address 0x20h is related to the snoop mode. Is this correct?
>This depends on how the DDC block is setup.
>In a DDC implementation as follows, the DDC would not be able to communicate:
I apologize for not understanding this product.
Best regards,
Hiroshi
Hey,
No problem!
The DDC communication is a link negotiation bus between the source and the sink. This is where information like the resolution, refresh rate, and link rates are set.
There are two ways to set up the DDC of the DP159 in an HDMI application:
1) The DDC goes through the DP159 (DDC is in series through the DP159). In this case of the DP159 is powered off, then the DDC will not be able to communicate:
2) The DDC is routed around the DP159, and the device is used in snoop mode. (DDC is in parallel with the DP159)In this case if the DP159 is powered off, the DDC will still be able to communicate:
If you plan to use OE pins, then the device will be powered off. I'm not sure if the TMDS_OE bit turns off the device, or just the TMDS lanes. I'm pretty sure it only toggles the TMDS lanes, but I will verify in lab and get back to you.
Hey,
Just finished testing. Its found that the TMDS_OE pin does not affect video output at all. Its best to use the PD_EN bit in register 0x09.
When using this pin this powers down the DP159, but the I2C control lines remain active.
If this device was displaying video before setting the PD_EN pin, then the source will keep DDC communication for ~10s after the PD_EN is set to 1. In that 10s window setting the PD_EN pin to 0 will resume video as normal.
If PD_EN is not set to 0 before the 10s window then HPD must be toggled for video to resume.
