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DS90UB948-Q1: Problems sending I2S from Rasperry Pi to UB948 via UB947

Oliver Nittka
Prodigy 20 points
Part Number: DS90UB948-Q1
Other Parts Discussed in Thread: TLV320DAC3100

Tool/software:

Hello everybody,

I'm having trouble sending I2S data, created by a Raspberry Pi, from DS90UB947 to DS90UB948. Ultimately, the data will be sent from the UB948 to a TLV320DAC3100, but at the moment, I'm just measuring at the Pins of the UB948. See below for the various connections.

My current problem is that only I2S_CLK seems to arrive at the UB948, I2S_WC and I2S_DA don't ever change when applying 44.1 kHz, 16 bit stereo signal to UB947 (CLK 1.5 MHz).

A few explanations for my setup:

The UB948 and the TLV320DAC3100 are sitting inside the customers hardware, which is the device I ultimately need to test (UUT).

The test bench is equipped with a Göpel VideoDragon GCAR9222 (www.goepel.com/.../lvds) which serves as the HIL tester. I can already display images on the UUT and communicate to the UB948 and attached devices via I2C.

As the VideoDragon cannot produce I2S signals, it was decided to create those using a Raspberry Pi. Its I2S Pins are connected to the external Interface of the VideoDragon from where they are (supposedly) routed to the UB947 which (supposedly) sends them to the UB948. As I cannot get to the pins of the UB947, I need to rely on de firmware of the VideoDragon. However, I already verified the routing by creating static signals from the Raspberry and configuring the UB947 pins as GPIO inputs. There, everything looks OK.

My connections are as follows:

RPI pin 12 (BCK) -> VideoDragon -> UB947 pin 35 (I2S_CLK) -> UB948 Pin 13 (I2S_CLK)
RPI pin 35 (LRCK) -> VideoDragon -> UB947 pin 34 (I2S_WC) -> UB948 Pin 14 (I2S_WC)
RPI pin 40 (DOUT) -> VideoDragon -> UB947 pin 36 (I2S_DA) -> UB948 Pin 12 (I2S_DA)

The Signal from the Raspberry:

I tried 44.1 kHz and 48 kHz, 16 bit PCM. I currently haven't managed to output any other frequencies - need to investigate first. But according to the UB947 data sheet, this should be allowed?
I know that the Raspberry cannot produce the exact frequencies, may this by a problem?


I haven't set any I2S-specific registers in the UB947 or UB948: to my understanding, the default values should just forward I2S to the deserializer?
From the schematics, I can see the UB948 is set to MODE_SEL0=2 and MODE_SEL1=0. I don't have access to the scematics on the VideoDragon, so I can't tell for the UB947.
The UB947 is set to Single OLDI (see registers below).


Those are the register values I'm setting (I had some help from Göpel, so I'm not sure I understand every setting here):

UB947:
0x03 0xDA
0x07 0x0C
0x08 0x00
0x17 0xDA
0x18 0x19
0x19 0x2F
0x4F 0x40
0x0D 0x23
0x0E 0x03
0x0F 0x03


UB948:
0x02 0xF0
0x07 0x34
0x1D 0x15
0x1E 0x35
0x1F 0x05
0x22 0x00
0x3B 0x1F
0x43 0x06
0x49 0x62
0x59 0x3F
0xA2 0x7D


I would like to mention that I'm actually a test system developer and don't have much experience with I2S (or LVDS for that matter), I was just hired to integrate the VideoDragon into the test system, so I apologize if any crucial info is missing here.

Thank you in advance
Oliver Nittka

  • 0
    TI__Mastermind 19055 points

    Hi Oliver,

    I will begin looking into this for you, thank you for providing all this information thus far. 

    Oliver Nittka said:
    I tried 44.1 kHz and 48 kHz, 16 bit PCM

    The associated I2S CLK frequencies are 1.411 MHz and 1.536 MHz, respectively. Do you know how close the frequencies of the Raspberry Pi are to these values when 44.1 kHz and 48 kHz sample rates are selected?

    Oliver Nittka said:
    Those are the register values I'm setting (I had some help from Göpel, so I'm not sure I understand every setting here):

    I will check your current configurations to see if they match the functionality of the I2S setup.

    If you find any further information regarding the investigations, please feel free to update this thread as needed.

    Thank you,

    Miguel

  • 0 in reply to Miguel Bolante
    TI__Mastermind 19055 points

    Hi Oliver,

    After checking the register configurations, I have found the following descriptions in the 947:

    \\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\

    0x03 = 0xDA -> 1101 1010

    • CRC enabled
    • Reserved
    • I2C Remote Write is auto acknowledged disabled
    • Filtering enabled for HS VS DE
    • I2C Pass through mode
    • Reserved
    • Enable Auto switch for internal oscillator in absence of PCLK
    • Reserved

    0x07 = 0x0C -> 0000 1100
    7-Bit address of target device is set to 0x0C

    • Is DES ID set? This would be register 0x06 = 0x58

    0x08 = 0x00 -> 0000 0000

    • No alias is set for the target device

    0x17 = 0xDA -> 1101 1010

    • I2C Pass all enabled, serializer target ID does not matter
    • SDA hold time 101 = 5 * 40 = 200 ns
    • I2C glitch filter 1010 = 10 * 5 = 50 ns

    0x18 = 0x19 -> 0001 1001

    • SCL High time = (25 + 5) * 40 ns = 1200 ns (1.2 us)

    0x19 = 0x2F -> 0010 1111

    • SCL Low time = (47 + 5) * 40 ns = 2080 ns (2.08 us)

    0x4F = 0x40 -> 0100 0000

    • SPWG mapping
    • Single-pixel receiver mode
    • OLDI ports are default
    • Reserved
    • Default

    0x0D = 0x23 -> 0010 0011 (GPIO Configuration)

    • Production device
    • Output LOW (Default)
    • GPIO mode = 011 = GPIO mode input

    0x0E = 0x03 -> 0000 0011

    • Output LOW (Default)
    • GPIO 2 mode = 000 = functional input mode
    • GPIO 1 mode = 011 = GPIO mode input

    0x0F = 0x03 -> 0000 0011

    • Reserved
    • GPIO 3 mode = 011 GPIO mode input

    \\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\==//==\\

    There are some registers that may not be configured yet from the SER side:

    For Data-Island audio:

    • 0x04
    • 0x12
    • 0x1A
    • 0x54

    For FC GPIO audio:

    • 0x12
    • 0x1A
    • 0x54

    See the thread below for further context:

    (11) [FAQ] DS90UH941AS-Q1: How to configure FPD-Link III 94x audio - Interface forum - Interface - TI E2E support forums

    From this thread, "Once the serializer is configured, the connected deserializer should not need any additional setup with respect to audio."

    In this way the GPIOs can be double checked against the recommended I2S setup. I see GPIOs 0-3 are programmed, but the I2S configurations span the length of GPIO 2-7 (excluding 4).

    Please let me know your thoughts on this!

    Best,

    Miguel