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TCAL9539-Q1: The min value of Tcsl for fast mode

Wenting Wu
Intellectual 2355 points
Part Number: TCAL9539-Q1

Tool/software:

Hello Expert,

My customer tests IIC bus related parameters and found that the SCL low time does not meet the criteria of a slave for TCAL9539-Q1. The JACINTO, TDA4 SOC comes with a sdk or kernel drive set to 50% duty cycle of the IIC. SCL low is 1/(400K*2)=1.25us. This does not meet the minimum 1.3 us requirement. What is the risk if this parameter standard is not met? Does it risk to modify the associated high and low time register values in the self-contained drive code if the requirement is met without frequency reduction accepted? Or is there a risk of modifying the value of the associated high-low time registers in the user application code after the own drive configuration is complete? 

The customer can not use FAST MODE PLUS, because this mode needs 1.8V power supply and my customer's hardware is fixed. even the frequency can be 1MHZ, SCL low is 1/(1M*2)=0.5us, there is no margin as well. 

Best regards,

Wenting

  • 0
    TI__Mastermind 48248 points

    Hi Wenting,

    tLOW timing spec according to the I2C standard is actually measured from 30% to 30% threshold. 

    In the customers perspective, this would actually make the measurement worse, tLOW(SCL) would be less time if measured from 30% to 30%. 

    Operating at 1.25us when the specification calls for 1.3us is operating outside the I2C specification, and therefore operating outside the datasheet spec for the TCAL9539-Q1. The device is no longer guaranteed correct operation for fast mode (400kHz) if the tLOW time is below the minimum. In my experience, I wouldn't expect the TCAL9539-Q1 to have any issue with 1.25us tLOW time, but I cannot guarantee device operation from a datasheet perspective. 

    My recommendation for the customer would be to alter the I2C driver within their SoC. Is there a way to tune the tLOW timing spec to give more delay? 

    This might also be a measurement issue. Can the customer zoom in on a single LOW period and measure 30% to 30% using the cursors with high sampling rate? Trying to see if the customer gains better resolution with in the o-scope, that it might yield a better measurement for tLOW. 

    Regards,

    Tyler

  • 0
    Guru 317350 points

    The values in this table are copied from the I²C specification. If your bus exceeds these values, then it might not work with some I²C devices for that mode.

    The TCAL9539-Q1 supports both Fast Mode and Fast Mode Plus, so it will definitely work with any tscl larger than 0.5 µs.

    But you might get problems with other devices that support only Fast Mode. Try reducing the clock (you are not required to use exactly 400 kHz; any lower frequency like 384 kHz will also work, and results in Fast-Mode compatible timings).