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DP83TG720S-Q1: DP83TG720S-Q1

Part Number: DP83TG720S-Q1

Tool/software:

Hello,

The DP83TG720S- Q1 uses functional pins as strap options to place the device into specific modes of operation. For PHY address, 3 level are necessary.
In my setup, I noticed that address which require Mode 3 [ ie Adress (5),(10),(13),(14) and (15) ], obtained when RH equal to 800 Ohm for VDDIO 1V8, is problematic.

The communication and so the configuration fail. At reset, the voltage is well above 0.84*VDDIO ( 1V512 ) as mentioned in your electrical characteristics ( around 1V6 measured ).
I changed the value of RH in order to get a higher voltage ( ie 1V7 ) and the PHY is now configured properly !!!!

Note that I designed a Ethernet module board with your chip on board and on some module the PHY works properly for all address with the RH value mentioned in the datasheet.
Could you help me on this topics ? are you aware on this problem ?
Is it ‘normal’ that I have to change the RH value ?
Thanks in advance for your reply.

  • Hi Christophe.

    I want to confirm my understanding:

    • You are using a custom board with DP83TG720
    • VDDIO=1.8V
    • When you strap RX_CTRL STRAP or STRP_1 STRAP into mode 3 with an 800 Ohm pull up, the PHY cannot be recognized by your software
    • You configured the RX_CTRL STRAP and STRP_1 STRAP to be pulled to 1.7V, and now it is being recognized. Can you confirm here that the addresses being recognized here are the same as the Mode 3 addresses?  [ ie Adress (5),(10),(13),(14) and (15) ]

    Best regards,

    Melissa

  • Hi Melissa,
    Thank you for your fast answer.
    Your understanding is right, just one correction.
    The problem appears when RX_CTRL STRAP and/or STRP_1 STRAP are configured into mode 3.
    Note that a module configured in address 5 is recognized when the address 4 is applied. Same thing with a module configured in address 10, he’s recognized when the address 8 is applied.
    To be honest I have pulled to 1V7, only RX_CTRL STRAP.
    So, I’m sure that address which implies problem are Adress (5),(10),(13),(14) and (15) but I have tried to solve the problem only for address 5.
    I will do the others address (configurations) today

  • Hi Christophe,

    Thanks for confirming. Let me test this on my bench setup, I will get back to you by Monday latest. 

    Best regards,

    Melissa

  • Hi Melissa,

    Have you progress on my concern?
    Have a nice day

  • Hi Christophe,

    Apologies for the delay, I will need a few more days to get the setup working.

    Best regards,

    Melissa

  • Hi Christophe,

    I tested RX_D3 pulled up to VDDIO=1.8V with an 800 Ohm resistor. We are able to recognize PHY Address 0x5 in this mode. 

    How are you reading the PHY address (with what program/terminal)? Is the processor communicating with the PHY also operating off of MDC/MDIO at 1.8V instead of 3.3V?

    Best regards,

    Melissa

  • Hi melissa,

    I'm not surprised that you're able to recognize PHY address 5 in this configuration.
    As I told you previously,  I designed a Ethernet module board with your chip on board and on some module the PHY works properly for all address with the RH value mentioned in the datasheet.
    So my concern is why for few module it doesn't work properly since the mode3 is 'seen' as a mode 2.

    I confirm that MDC/MDIO is also operating at 1V8

    Best regards,

    Christophe

  • Hi Christophe,

    The strap voltage can be affected by many factors into leakage current, temperature variation, and supply voltage variation. You can read more about it here.

    1.5V and 1.6V are quite close, so it is possible that the conditions in your design are slightly increasing the strap threshold voltage, making Mode 3 recognized as Mode 2. Can you provide a scope measurement of VDDIO and the strap pin voltage after reset? How many DP83TG720 units is this occuring on? 

    Best regards,

    Melissa

  • Hi Melissa,
    From your datasheet:
    The minimum bootstrap threshold for Mode3 is 0.84VDDIO ie 1V512.
    The accuracy for the pull up strap resistor asked in your datasheet is 10%.
    The integrated pull down resistance is around 4.725 and 7.875Kohm !!!!.
    The accuracy of my pull up is 5%. At reset the strap pin voltage on each module is each time above 1V6.
    Knowing that with numbers mentioned above the strap pin voltage could be at 1V517.
    As I mentioned previously, I changed the value of RH in order to get a higher voltage ( ie 1V7 ) and the PHY is now configured properly !!!!

    If strap voltage is so sensitive, why the pull-down resistor range value is so big ?
    Why don't you take more margin between bootstrap threshold voltages ?
    Finally, is it normal to set more than 1V7 to get Mode 3 ?

    Thanks in advance for your reply.

  • Hi Christophe,

    You are welcome to choose any resistor value for your design, the datasheet resistor values were just the ones we found worked for our design. However, every board will have a different design with different voltage supply ripples, different temperature conditions, etc. 

    We will take into consideration your feedback and consider adding a note about design variation.

    Best regards,

    Melissa