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DP83825I: Problem with RX_DV signal in repeater mode

Part Number: DP83825I

Tool/software:

We are currently working on a design for which we want to use a DP83825I in repeater mode to conect via RMII to another controller that acts as a PHY (a Valens VS3000).

We have designed and produced an experimental board, with which we connected a PC to the DP83825I via Ethernet and sent continuos pings to test. The link is detected and the DP83825I is receiving the PING packets, but the other chip marks them as incorrect. Checking with an oscilloscope we are seeing that the RX_DV signal is getting fired sooner than expected and is getting released also sooner than expected. See below the RX_DV signal (Red channel) with RX_D0 signal (Blue channel).

We checked with a wortking Ethernet design the same lines to see how they should look. See below the RX_DV signal (Blue channel) with RX_D0 signal (Red channel)

We are at a loss on what is happening here. We tried to artificially increment the lenght of the RX_DV trace to see if it can be delayed but doubling the distance (so it ends up being the largest line) just shaved around 5 ns out of 130 ns.

We also tried connecting two DP83825I in repeater mode as stated in the datasheet to test with a pure repeater and we got the same readings.

The schematics of the DP8325I part for both tests is as follows (NM is the same as DNP):

Any ideas on what is wrong for this to happen?

Thank you and best regards,

  • Hi Miguel,

    Are you currently seeing no transmission at all when attempting ping, or is there partial communication with some % packet loss?

    Do you have register access to the 825? Could you try reading Reg 0x17 and check the state of bit 4. Try flipping this bit and check to see if the problem persists or improves.

    Regards,

    Alvaro

  • Hi Alvaro,

    Thank you for your answer. There is no partial communication.

    In the required design there is no microcontroller so no register access, but I just made a little frankenstein to get access to MDC/MDIO from another board and flipping bit 4 of Reg 0x17 does work.

    So aparently we need to work with RMII v1.0 instead of v1.2? Do we have any way to achieve this without register access, either with DP83825 or other PHY?

    Thank you and best regards,

  • Hi Miguel,

    Thank you for indulging my curiosity and creating the MDC/MDIO read. Glad to hear that it works!

    From your schematic I see that you correctly have Pin 2 strapped high into Mode 1 with the 2.49k PU. This should be all that is necessary, but you have confirmed that it is not functional. Would it be possible to remove R6 and install R13 so that Pin 2 gets strapped low into Mode 0, instead of Mode 1, to see if it makes any difference? Do not use register access for this experiment.

    I'm hoping that this is a data sheet typo. If this experiment doesn't work, then it would seem Register access to flip Reg 0x17[4] is necessary.

    Regards,

    Alvaro

  • Hi Alvaro,

    Unfortunately it seems this does not work either. Tried both just removing R6 (since there should be and internal PU) and putting R13, and it still did not work. Such a pity...

    Would you know if there is any other TI alternative that supports doing this RMII repeater functionality? We need to also be able to force via strap 100M Full-duplex since the other partner will not support autonegotiation.

    Thank you and best regards,

  • Hi Miguel,

    I would recommend the https://www.ti.com/product/DP83822I. We also have this reference design, where the DP83825 is used in RMII repeater with the DP83822: https://www.ti.com/tool/TIDA-010046 

    In this design the DP8383825 is in RMII Master and receives a 25MHz XI clock, and provides the 50MHz clock to the DP83822. Would it be possible to make this change on your board?

    Regards,

    Alvaro