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DS160PT801: EEPROM config for non-common clock

Part Number: DS160PT801

Tool/software:

Greetings, 

I've implemented a DS160PT801 with the supported version of the Non-Common REFCLK architecture, drawn below. 

We're able to link up at gen4, however we run into errors when passing traffic through the link. 

We believe this is to do with the non-common clock architecture we're using, and possibly SSC from the motherboard. 

A few questions:

  • Are there any bits besides the one in register 0xAF (SRIS_EN) that need to be set for non-common clocking to work?
  • Does dp_cfg_port_orient_ov_n (bit 7) need to be set to 1 or 0? The programming guide lists it as RESERVED, resetting to 1.
  • What payload size do I need to choose (bits 2:0)? Is this the maximum payload size?