DP83822H: Design Review Support Request

Hi Anush,

Please refer to this schematic checklist:

https://www.ti.com/lit/zip/snlr053

After reviewing "Pin Wise Checklist" sheet to return here, I will provide additional comments.

Thank you,

Evan

Hello Evan,

Thanks for providing the Schematics Design Checklist sheet. Let me go through the sheet & get back to you with the updated schematics.

Thanks & Regards,

Anush

Hi Evan,

We are planning to operate the Ethernet PHY in RMII mode. From the datasheet it is mentioned as the TX CLK & RX CLK pins will not be used in RMII mode.

But in the Master / Slave Signaling diagrams, the RX CLK signals is mentioned as optional. Kindly let us know if we need TX CLK & RX CLK signals for proper RMII operations.

Thanks & Regards,

Anush

Hi Anush,

TX CLK and RX CLK are not required for proper RMII operation.

Thank you,

Evan