TL16C752C: INT signal is lost.

Ryu Yamashita said:

Are there any conditions under which the INT signal stops being generated?
When the INT signal is gradually lost, the timing of INT signal generation shifts.
At first, the INT signal is generated before the RX start bit, but it is gradually shifted so that it is generated after the RX start bit, and finally the signal is no longer output.

Are you reading the LSR to check to see if any of the incoming bytes have errors? 

This device has an errata published here: https://www.ti.com/lit/er/sllz058a/sllz058a.pdf?ts=1728501860852&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTL16C752C

You can essentially get framing errors with this device due to the errata. This should still generate an INT though if you have receiver interrupts enabled.

Ryu Yamashita said:

I assume that you are reading the received 1 bit with 16 bit oversampling.
In this case, I would like to know what bit is being read.

The only bits getting 16x sampling are the incoming bits on the RX line. 

In the case where the INT is lost (I assume it means the INT remains deasserted), are you able to provide a register dump of all the readable registers?

-Bobby

Hi Bobby,,

Thanks for the reply.
Here are the register values I am setting.

Best Regards,
Ryu.

Hi Ryu,

Something looks wrong with your IER settings. If this is all 0's then your INT pin will stop working. I would normally expect IER to have bit 0 and bit 2 enabled to be 1's

Is there something in your code that is writing to IER when it's not supposed to? This may explain why the INT is disappearing. 

-Bobby

Hi Bobby,

Review register settings.
Please let me know one more point.

BOBBY said:

The only bits getting 16x sampling are the incoming bits on the RX line. 

When oversampling the RX line, is the receive bit read at the 16th bit for both the stop bit and data bit?

Best Regards,
Ryu

Hi Ryu,

The bit getting sampled is on the 8th pulse of the sampling clock not the 16th. Using the 16th would likely cause a lot of signal integrity errors since that would sample the data too late.

-Bobby

Hi Bobby,

Thank you for your response.
Can you tell me about these as well?

①When the int signal is output when receiving TL16C752CRHBR data
②Is 16-bit oversampling reset each time at the start bit?

Best Regards,
Ryu

Hi Bobby,

Thank you for your response.
I understand about ②.
I would also like to know about ①, When is the int signal output when receiving data from the TL16C752CRHBR?

Best Regards,
Ryu