DS90UB913A-Q1: suggestion for SerDes - coax interface

Thanks Logan for the Answer,

Some questions:

I mentioned in the ticket header  the DS90UB913A-Q1 since the E2E ticket force you to add part number. So the intent was not to choose this particular IC.

1. Can you please suggest a part number for my task ? I look for a simpler device.
2. In case you do not have Serdes part from other category, and DS90UB913A-Q1 for example is used, some question about it:
   1. Does the DS90UB913A-Q1 have to be configured ? Can I not use the i2C at all ?
   2. With PLCK of 100Mhz , what would be the rate of single input Din-x ? would it be 100Mhz max ?
   3. Does the Din inputs must be synchronized with PCLK ?
   4. Can one transfer on din0 to din4 a stream of 5 times the rate of single din split into 5 and on the other side combine it to single 5x stream ? all that , while the other inputs transfer other data each in different rate ?
   5. Does my understanding is correct ? the aggregate rate can reach up to 500 Mbps (10channels of 100Mhz=1Ghz è 500Mbps)

Thanks,

  Avner

Hi,

I will try to explain my question:

Suppose I want to transfer 200M data stream bus  +2xRS422  and 3 switches aggregate them and send them via the SerDes DS90UB913A-Q1 over coax.

Q1. First is that device is the most suitable for this application ?

Q2 I will make sure that the inputs are first being sampled by PCLK and make sure to handle metastable states, prior feeding the signals to the SerDer. Now the rate of the whole Din together is 100Mx10. right?

 In that case the rate of the stream 200M exceeds the Din rate of 100M. So I thought of splitting the stream into 4 and  feed it to 4 first inputs, the other 2 inputs will be connected to the samples RS422 and the rest 3 inputs will pass the switch positions. In the other side of the link the de-mux DS90UB914A-Q1 will reconstruct the signals and the 4 first d outs will reflect the stream of data of rate of 200M in the same order , thus when muxing them in the FPGA I will get the exact same stream entered in the SERializer.  Does that make sense ?

Q3. Similar to Q2 Suppose I want to take the RMII signal that should be input to an Ethernet  PHY and feed them to the SERDES, can I connect the Ethernet PHY on the de-serializer side such that the whole SerDes link will be transparent to the Ethernet PHY ? (Thus attempting to pass ethernet + other signals over single coax line)

Q4 Does the DS90UB913A-Q1 is suitable for this application (taking various signals of different rates  and upload them on single coax)? Or for that application, I should select other kind of device?

 Thanks,

  Avner

Hi Avner,

Avner Cohen said:

Suppose I want to transfer 200M data stream bus  +2xRS422  and 3 switches aggregate them and send them via the SerDes DS90UB913A-Q1 over coax.

I'm not quite sure I fully understand your actual data requirements, however - put simply, these devices (913 or 933) can pass either 10-bit up to 100MHz (913) or 12-bit up to 100MHz. Maximum input PCLK is 100MHz, so if faster data speeds are required on single data input line, then the data needs further paralleled.

Your approach with paralleling them such that they are less than 100MHz seems technically possible,  provided you have the peripheral encoding/decoding/etc.

I can't really comment on whether these devices will truly be suitable for end to end requirements - as it is a little unclear on the implications of set-up/hold, oversampling, and so on; most of which are outside of the scope of SerDes.

Avner Cohen said:

taking various signals of different rates  and upload them on single coax

We will sample at PCLK interval and serialize that data, then reverse at Des. Its difficult to comment on overall suitableness into overall system.

Regards, 

Logan

Hi Logan,

The question if these devices are suitable refer to my application that I want to implement. Not the implication of setup and hold time.

Digging into Ti‘s site, I found the SDI chip LMH0340/LMH0341 or the LMH0397 that looks to be more fitting to my application. This is since I already have an FPGA that makes the MUXing of the various signals into single aggregate line, that I would like to transfer all into one coax cable.

1. What do you think? Is the SDI concept is better ?
2. The LMH0397 does not have a clock input so I do not know how to use it.
3. For further questions on the e LMH0340/LMH0341/ LMH0397 should I open another ticket or use this one please?

Thanks,

  Avner