• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 297 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65HVD71: Details of integrated ESD devices

bryant perez
Prodigy 10 points
Part Number: SN65HVD71

Tool/software:

Hi, I am performing lightning transient surge testing on the 422 Transceiver and am seeing some results that do not make sense. First off, I have external TVS protection and series resistance as detailed in the datasheet, page 24 (link to datasheet attached below). The external TVS is doing its job as expected, however, when measuring at the Tx pins of the transceiver, I am seeing conduction through the transceiver. This conclusion is due to the voltage drop measured across the series resistance. The voltage measured at the Tx pins does not resemble a TVS response and the transceiver goes very low impedance. I am attaching a screenshot of the waveforms measured at the TX pin of the transceiver. Note the current trace is the measured current input to the box pin, so it includes the external TVS and the device conduction. 

I would like to understand why the transceiver is conducting and I think learning more about the integrated protection would help.

Thanks

P.S. I can tell I am not conducting through the output push pull driver because if I lower the level of the transient I do not get conduction.

www.ti.com/.../sn65hvd71.pdf

  • 0
    TI__Guru 72901 points

    Hi Bryant,

    Do you have a scopeshot of the event occurring with Vcc on one of the scope channels? 

    For the first spike on the blue wave....My initial guess is the Vcc net of the device is likely seeing some coupling from such a fast edge rate or the scope probe is picking up some of the EMI from the shock. If you're shocking the bus pins, the initial shock shouldn't directly couple through the device from the A/B pins into the Tx pin. 

    I'm not sure why there is a second edge that spikes up to around 7V 300uS after the shock. Are you performing any kind of toggling or additional tests after the shock at the 300us timestamp here? 

    -Bobby

  • 0 in reply to BOBBY
    Prodigy 10 points

    Hi Bobby, thanks for the response.

    I want to clarify my initial post: when I say Tx pins, I mean the bus Y/Z pins. I am not concerned with coupling through the device.

    I am not toggling anything on the device, it is powered (VCC=3.3V) but idle.

    My interpretation of the of the second blue spike is that this is the result of the device diodes no longer conducting.

    I am attaching some more screenshots which will hopefully help. The first picture is the open circuit voltage transient surge waveform for reference. The second is the same transient applied to the device bus Rx pins A/B and this is what I expect to see if there is no conduction through the device bus pins. 

  • 0 in reply to bryant perez
    TI__Guru 72901 points

    Hi Bryant,

    Thanks for the explanation. I think I understand your set up now. 

    So you're basically asking why the Y/Z pins see this kind of clamping where both the internal ESD clamp and the external ESD clamp trigger.

    bryant perez said:

    But for the A/B pins, only one of the clamps (external) triggers.

    I think the reason is because the circuitry on the Y/Z pins are basically CMOS outputs without any additional protection to them. 

    The A/B pins is a receiver circuit and for that, there is some resistor network (I treat this as a blackbox) that sits before the CMOS inputs to attenuate the signal (think of it as a resistor divider to handle the larger common mode shifts). So the A/B pins don't see the same voltage level as what you're probing externally, they see a smaller value. This likely makes the internal ESD not trigger because the voltage is below it's triggering point by the time the external clamp triggers. 

    -Bobby

  • 0 in reply to BOBBY
    Prodigy 10 points

    Hi Bobby,

    I agree that this is likely what is happening. My question now is whether the internal ESD is rated for this type of transient. Is there more info/testing data on the internal ESD that I can use to disposition this issue. I need to justify that I am not damaging device or else I have to change the external design.

    Thank you

  • +1 in reply to bryant perez
    TI__Guru 72901 points

    Hi Bryant,

    Since the device itself isn't rated for surge, the ESD cell wasn't designed with the surge testing in mind. The peak power in surge event is way bigger than the peak power in ESD strikes since the surge events happen in the microsecond range 

    Devices that are rated for surge usually involve huge ESD cells that are included internal to the package. Our THVD24x9 devices have this kind of set up so they can handle surge. I couldn't find a device in our portfolio that is full duplex with surge protection so I don't think there is an easy drop in replacement for the device you chose.

    We have a TI Design below which walks through how to set up surge protection. Adding the TBUs and MOVs may be necessary to help dissipate the power away from the internal ESD cells.

    https://www.ti.com/lit/ug/tiduas1b/tiduas1b.pdf?ts=1729209469424&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FTIDA-00731

    -Bobby