TFP410: Routing Gideline

?? ??

Part Number: TFP410

Tool/software:

Hello,

Could you tell me the detailed wiring conditions for board design?

The following was stated in the application note (SLLA135):
- recommended impedance is 50Ω
- trace spacing is 5 times the height

Are there any specified or recommended values for the following conditions?
- allowing Number of vias
- allowed Length of via stubs
- maximum length limit
- trace length matching between P/N differential pair
- total length matching tx pair

Regards.

over 1 year ago

+1 Vishesh Pithadiya over 1 year ago

TI__Mastermind 42161 points

Hi,

?? ?? said:
- allowing Number of vias

We recommend no more then 2 vias

?? ?? said:
- allowed Length of via stubs

N/A. Try to minimize vias as much as possible. Typically go from top layer to bottom

?? ?? said:
- maximum length limit

Depends on the insertion loss of the material used. Keep with defined loss of an HDMI cable found in teh HDMI/ DVI spec.

?? ?? said:
- trace length matching between P/N differential pair

Both P and N should be within 5 mils of each other

?? ?? said:
- total length matching tx pair

Keep all TX races within 100mil of each other

Can you send a block diagram/ schematic of your design? I will be able to provide a more tailored response with more information.

0 ?? ?? over 1 year ago in reply to Vishesh Pithadiya

Prodigy 20 points

Hello,

I appreciate for answer.
My issue is solved by your answer.

Regards.

Interface

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TFP410: Routing Gideline