Tool/software:
Hi.
I am using DS250DF230 in a SOC to SFP+ applicaiton at 10.3125Gbps, 25MHz clock reference.
I have a CLI command developed to adjust the VOD of the channel which does not work. In the examples below, I have a fiber loopback, the VOD sent on CH1 is received on CH0.
The command programs an index from an array taken from programming manual section 7.11. I will place explanations on each command, starting with ";".
; select VOD table index 20 meaning { 0, 20, 0, 0.985, RTMR_DB_FLOAT_NA, RTMR_DB_FLOAT_NA}, // 20
// see 7.11 table
typedef struct rtmr_out_drive_s {
int8_t precursor;
int8_t maincursor;
int8_t postcursor;
float vod;
float rpre;
float rpst;
} rtmr_out_drive_t;
pc-sh# rtmrctrl -c 1 -a 20 -d -v
[main] - INFO: access I2C bus
Change TX output drive index
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3d VAL = 0x94
[i2c_rmw][W] REG = 0x3d VAL = 0x94
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3d VAL = 0x94
[i2c_rmw][W] REG = 0x3d VAL = 0x94
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3f VAL = 0x00
[i2c_rmw][W] REG = 0x3f VAL = 0x00
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3e VAL = 0x00
[i2c_rmw][W] REG = 0x3e VAL = 0x00
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3d VAL = 0x94
[i2c_rmw][W] REG = 0x3d VAL = 0x94
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3f VAL = 0x00
[i2c_rmw][W] REG = 0x3f VAL = 0x00
[i2c_rmw][R] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xff VAL = 0x01
[i2c_rmw][W] REG = 0xfc VAL = 0x02
[i2c_rmw][R] REG = 0x3e VAL = 0x00
[i2c_rmw][W] REG = 0x3e VAL = 0x00
PRE_CURSOR : 0
MAIN_CURSOR : 20
POST_CURSOR : 0
VOLTAGE_DIFF : 0.985 [V]
PRE_RATIO : 0.000 [dB]
POST_RATIO : 0.000 [dB]
; we check the result
pc-sh# rtmrctrl -c 1 -r 0x3e
[READ] REG = 0x3e VAL = 0x00
pc-sh# rtmrctrl -c 1 -r 0x3d
[READ] REG = 0x3d VAL = 0x94
pc-sh# rtmrctrl -c 1 -r 0x3f
[READ] REG = 0x3f VAL = 0x00
; we check the eye opening but this one is not changed, stays the same as before
pc-sh# rtmrctrl -s
Display statistics
[TOP]
REFCLK_DET : true
[SFP_RX/RTMR_CH0_RX]
[CH0] SIG_DET : true
[CH0] CDR_LOCK : true
[CH0] SIG_DET_EVT : false
[CH0] CDR_LOCK_EVT : false
[CH0] SIG_DET_LOSS_EVT : false
[CH0] CDR_LOCK_LOSS_EVT: false
[CH0] EYE_OPEN_H : 0.6875 [UI]
[CH0] EYE_OPEN_V : 475 [mV]
[CH0] CDR_PPM_CHECK_OK : true
[CH0] CDR_EQ_ADAPT_OK : true
[CH0] CDR_SIG_AMP_FAIL : false
[CH0] CDR_DATA_RATE_OK : true
[SOC_RX/RTMR_CH1_RX]
[CH1] SIG_DET : true
[CH1] CDR_LOCK : true
[CH1] SIG_DET_EVT : false
[CH1] CDR_LOCK_EVT : false
[CH1] SIG_DET_LOSS_EVT : false
[CH1] CDR_LOCK_LOSS_EVT: false
[CH1] EYE_OPEN_H : 0.90625 [UI]
[CH1] EYE_OPEN_V : 562.5 [mV]
[CH1] CDR_PPM_CHECK_OK : true
[CH1] CDR_EQ_ADAPT_OK : true
[CH1] CDR_SIG_AMP_FAIL : false
[CH1] CDR_DATA_RATE_OK : true
pc-sh#
Question is:
Is there any other register that needs to be written to executed VOD change?
I have also tried after VOD update to do a CDR reset and then read the eye opening. Same result (or very close as the equalizer does not have every time after a CDR reset same H and V)