TUSB1210: please help confirm if the REFCLK signal is ok or not.

Hi Tao:

    Overshoot could means very fast rise/fall time, can you measure rise/fall time?

Best

Brian

if measure trise and fall time between 0-3v as below, the rise time and fall time is about 2.5ns.

though i did not find the spec for REFCLK rise/fall time in datasheet.

There is rise/fall time spec for REFCLK.

With 26Mhz clk, rise/fall time spec will be slower than 3.8ns, so 2.5ns is faster than spec mentioned.

Best

Brian

Dear Brian,

the spec is max 20% cutycycle, is it the total of rise+fall? my understanding is rise or fall is 20% dutycycle in this spec discription "rise/fall".

even so, i calculated, my clock is 19.2Mhz, the rise and fall criteria is 5.2ns. so rise/fall time is ok?

any other point to consider?

and what would happen if rise/fall is smaller then spec?

for 19.2Mhz, rise/fall time looks ok.

REFCLK require a square waveform between 3-3.6v, from you measurement, it's 3.98v, a little too high based on Spec.

Best

Brian

so what risk if i don't change the circuit. dose it affect usb function in any way? customer also don't want to change bom now, so ask us to estimate the potential risk

Hi Tao:

    This is the reference clock for internal PLL , all USB HS , FS and LS function are based on PLL. If PLL is not working perfectly, it will definitely affect USB function.

    the potential risk is around 20-30%.

Regards

Brian

Dear Brian,

thank you for your reply, i understand it is important.

"the potential risk is around 20-30%".  20-30% refer possibility? this means it is likely to have function fail? we did not receive many NG report currently.