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TLK10232: 10G-KR to SFP Setup Help

Lucas Wolter
Mastermind 27610 points
Part Number: TLK10232
Other Parts Discussed in Thread: DS110DF111

Tool/software:

<converting from email>

I am trying to use the TLK10232 to convert 10KR to SFP. I based my design around some forum posts which indicated that you should be able to connect the High Speed Side A to High Speed Side B by way of an internal switch. I have 2 eval boards connected together and I am using the GUI to try to configure the parts.

This is my current eval board setup:

The goal is to be able to ping from one laptop to another. If I remove the eval boards and just use the fiber, I can ping. Adding the eval boards back in, I am unable to ping.

So far, I can get a link light between the switch and the eval board (on the SFP side) but I cannot get data across the 10KR (coax side).

If I can get this working, I can avoid respinning my actual design.

  • 0
    TI__Mastermind 27610 points

    Hi Ari,

    Are you configuring each eval board using the GUI or with direct register reads/writes? Can you share your configuration sequence for both boards so I can review?

    Best,

    Lucas

  • 0 in reply to Lucas Wolter
    Prodigy 50 points

    Each eval board is configured via the GUI. From other forum posts, it looks like i am supposed to configure the SFP for no link training and no autonegotiation. The 10KR side should have link training and autonegotiation.

    Here are my settings

    Channel A- SFP

    • Operation Mode
      • 10G-KR
      • Loopback Mode- Transciever
    • Clock Rate Cfg
      • Ref Clock Freq- 156.25
      • HS Serial Data Rate- 10312.5
      • HS Serdes PLL...- Higher End...
      • Enable HS PLL- ON
      • Enable LS PLL - OFF
      • High Speed Ref Clk- REFCLK0
    • HS TX Cfg
      • Enable TX (ON) 
      • Polarity- Normal
      • All other settings default
    • HS RX Cfg
      • Enable RX (ON)
      • Enable ENTRACK (ON)
      • Hold Equalizer... (ON)
      • EQ Precursor- 11/9
      • Adaptive Gain- No change when locked
      • Auto Zero- Initiated when RX is enabled
      • P/N Polarity- Normal
      • HS Serdes Peak..- Normal
      • H1 CDR...- Normal
      • Clock Recovery- 2nd order 1x mode
      • Clock data recovery...- 8 vote
    • LS Input Cfg
      • All off
    • LS Output Cfg
      • All off
    • LOS Overlay
      • Enable HS_LOS_MASK- ON
      • all others OFF
    • Lane Alignment Cfg
      • LS Channel Sync... Ethernet Standards
      • Reflected Lane Status... - Lane 3
      • LS Serdes PLL lock... - ON
      • LS Serdes LOS status...- ON
      • Force Lane Realignment...-OFF
      • HS Channel Sync- Ethernet Standards
      • 10 Bit Alignment P...-283 (defualt)
      • 10 Bit Alignment N...-17C (default)
      • Disable 8B/10B Encoder on HS- OFF
      • Disable 8B/10B Decoder on HS- OFF
      • Disable RX CTC Operation- OFF
      • Disable TX CTC Operation- OFF
    • Auto Control Cfg
      • Disable HS PLL status... - OFF
      • Disable HS LOS status...- OFF
      • Disable Sync Status...-OFF
      • CLKOUT clock...- ON
    • Override Cfg
      • All off
    • TX Switch Cfg
      • Enable pin switch... OFF
      • Data Switch TX Source if PRTAD0 HIGH... Alternate HS data
      • Data switch TX source of PRTAD0 LOW - Alternate HS data
      • Data selection for TX... - Alternate HS data
      • TX Data Switch Trigger Condition...- OFF- any data ON- Any data
      • Duration of Clock... - 20
      • TX Data Pattern.. ON.. - KR: Idle
      • TX Data pattern.. OFF.. - KR: Idle
      • DST_OFF_CHAR- 2FD
    • RX Switch Cfg
      • Enable pin switch... OFF
      • Data Switch RX Source if PRTAD0 HIGH... Alternate HS data
      • Data switch RX source of PRTAD0 LOW - Alternate HS data
      • Data selection for RX... - Alternate HS data
      • TX Data Switch Trigger Condition...- OFF- any data ON- Any data
      • Duration of Clock... - 20
      • TX Data Pattern.. ON.. - KR: Idle
      • TX Data pattern.. OFF.. - KR: Idle
      • DST_OFF_CHAR- 2FD
    • PMA Control Cfg
      • Enable Power Down - OFF
      • Enable Loopback...- OFF
    • Link Training Cfg
      • Link training enable... OFF
      • Enable 10GBASE-KR... -OFF
    • LT Local Device Control Cfg
      • Local Device Present- Normal Operation
      • Local Device Init- Normal Operation
      • LT Local Device Swing Update- Hold
      • LT Local Device Post2..- Hold
      • LT Local Device Coef K(+1)- Hold
      • LT Local Device Coef K(0)- Hold
      • LT Local Device K(-1)- Hold
    • KR FEC Control
      • Enable FEC decover... - OFF
      • Enable 10GBASE-R FEC- OFF
    • KR Vendor Specific Cfg
      • RX CTC FIFO- 32 deep
      • RX CTC Watermark- 11
      • Sequency Columns are... - OFF
      • Enable Q column... - OFF
      • TX CTC FIFO- 32 deep
      • TX CTC Watermark- 11
      • Sequency Columns are... - OFF
      • Enable Q column... - OFF
      • Transmit Idle Pattern... - OFF
      • KR CTC Error Code...LN0...- OFF- 9C
      • KR CTC Error Code...LN1...- OFF- 0
      • KR CTC Error Code...LN2...- OFF- 0
      • KR CTC Error Code...LN3...- OFF- 1
      • LS OUT Test Pattern...- High Frequency Test Pattern
      • LS OUT Test Pattern Enable- Normal Operation
      • LS IN Test Pattern...- High Frequency Test Pattern
      • LS IN Test Pattern Enable- Normal Operation
    • PCS Control Config
      • All OFF
    • Autonegotiation Control
      • All OFF

    Channel B- 10KR

    • Operation Mode
      • 10G-KR
      • Loopback Mode- Transciever
    • Clock Rate Cfg
      • Ref Clock Freq- 156.25
      • HS Serial Data Rate- 10312.5
      • HS Serdes PLL...- Higher End...
      • Enable HS PLL- ON
      • Enable LS PLL - OFF
      • High Speed Ref Clk- REFCLK0
    • HS TX Cfg
      • Enable TX (ON) 
      • Polarity- Normal
      • All other settings default
    • HS RX Cfg
      • Enable RX (ON)
      • Enable ENTRACK (ON)
      • Hold Equalizer... (ON)
      • EQ Precursor- 11/9
      • Adaptive Gain- No change when locked
      • Auto Zero- Initiated when RX is enabled
      • P/N Polarity- Normal
      • HS Serdes Peak..- Normal
      • H1 CDR...- Normal
      • Clock Recovery- 2nd order 1x mode
      • Clock data recovery...- 8 vote
    • LS Input Cfg
      • All off
    • LS Output Cfg
      • All off
    • LOS Overlay
      • Enable HS_LOS_MASK- ON
      • all others OFF
    • Lane Alignment Cfg
      • LS Channel Sync... Ethernet Standards
      • Reflected Lane Status... - Lane 3
      • LS Serdes PLL lock... - ON
      • LS Serdes LOS status...- ON
      • Force Lane Realignment...-OFF
      • HS Channel Sync- Ethernet Standards
      • 10 Bit Alignment P...-283 (defualt)
      • 10 Bit Alignment N...-17C (default)
      • Disable 8B/10B Encoder on HS- OFF
      • Disable 8B/10B Decoder on HS- OFF
      • Disable RX CTC Operation- OFF
      • Disable TX CTC Operation- OFF
    • Auto Control Cfg
      • Disable HS PLL status... - OFF
      • Disable HS LOS status...- OFF
      • Disable Sync Status...-OFF
      • CLKOUT clock...- ON
    • Override Cfg
      • All off
    • TX Switch Cfg
      • Enable pin switch... OFF
      • Data Switch TX Source if PRTAD0 HIGH... Alternate HS data
      • Data switch TX source of PRTAD0 LOW - Alternate HS data
      • Data selection for TX... - Alternate HS data
      • TX Data Switch Trigger Condition...- OFF- any data ON- Any data
      • Duration of Clock... - 20
      • TX Data Pattern.. ON.. - KR: Idle
      • TX Data pattern.. OFF.. - KR: Idle
      • DST_OFF_CHAR- 2FD
    • RX Switch Cfg
      • Enable pin switch... OFF
      • Data Switch RX Source if PRTAD0 HIGH... Alternate HS data
      • Data switch RX source of PRTAD0 LOW - Alternate HS data
      • Data selection for RX... - Alternate HS data
      • TX Data Switch Trigger Condition...- OFF- any data ON- Any data
      • Duration of Clock... - 20
      • TX Data Pattern.. ON.. - KR: Idle
      • TX Data pattern.. OFF.. - KR: Idle
      • DST_OFF_CHAR- 2FD
    • PMA Control Cfg
      • Enable Power Down - OFF
      • Enable Loopback...- OFF
    • Link Training Cfg
      • Link training enable... OFF
      • Enable 10GBASE-KR... -ON
    • LT Local Device Control Cfg
      • Local Device Present- Normal Operation
      • Local Device Init- Normal Operation
      • LT Local Device Swing Update- Hold
      • LT Local Device Post2..- Hold
      • LT Local Device Coef K(+1)- Hold
      • LT Local Device Coef K(0)- Hold
      • LT Local Device K(-1)- Hold
    • KR FEC Control
      • Enable FEC decover... - OFF
      • Enable 10GBASE-R FEC- OFF
    • KR Vendor Specific Cfg
      • RX CTC FIFO- 32 deep
      • RX CTC Watermark- 11
      • Sequency Columns are... - OFF
      • Enable Q column... - OFF
      • TX CTC FIFO- 32 deep
      • TX CTC Watermark- 11
      • Sequency Columns are... - OFF
      • Enable Q column... - OFF
      • Transmit Idle Pattern... - OFF
      • KR CTC Error Code...LN0...- OFF- 9C
      • KR CTC Error Code...LN1...- OFF- 0
      • KR CTC Error Code...LN2...- OFF- 0
      • KR CTC Error Code...LN3...- OFF- 1
      • LS OUT Test Pattern...- High Frequency Test Pattern
      • LS OUT Test Pattern Enable- Normal Operation
      • LS IN Test Pattern...- High Frequency Test Pattern
      • LS IN Test Pattern Enable- Normal Operation
    • PCS Control Config
      • All OFF
    • Autonegotiation Control
      • Enable Autonegotiation - ON
      • Next Page available- OFF
      • Set RF Bit to 1- OFF
      • Device supports 10GBASE-KR- ON
      • Device supports 10GBASE-KX- OFF
      • Technology ability... - OFF
      • Request to enable FEC- OFF
      • 10GBASE-KR has FEC ability- OFF
      • PAUSE... - 4
      • Selector Field Value- 1
      • Technology Ability... 24:11- 0
      • Technology Ability... 10:3- 0
      • Echo Nonce...-0
      • Next page available- OFF
      • Next page is a message...- ON
      • Deice is able to act on the.... - OFF
      • Message/Unformatted code 10:0- 0
      • Message/Unformatted code 31:16- 0
      • Message/Unformatted code 47:32- 0
  • 0 in reply to Ari Hendler
    TI__Mastermind 27610 points

    Hi Ari,

    Thank you for sharing your configuration. I reviewed and don't see any clear issues with the settings you are using.

    My recommendation is to start with a simpler setup. Can you try disabling AN and LT on the 10G-KR link? It would be good to see if you can get the link up in this condition.

    Additionally, I saw you asked another E2E question about using DS110DF111 for 10G-KR to SFP. If you can disable AN and LT on the 10G-KR side in your system implementation, then DS110DF111 is a much simpler device to get working in this use case.

    Best,

    Lucas