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Need help selecting 12VDC to Vout : 4V-5V (+3.3VDC)@200mAmp supply

Part Number: TUSB1104
Other Parts Discussed in Thread: TPS7A94, TPS561246, TPSM861252, TPSM82912, TPS62912

Tool/software:

Dear Sir/Madam,

We are developing FMC card using TI Redriver TUSB1104 for our 10 Gbps, USB3.2, Gen2, 2x2 mode IP core testing. Host boards will be Xilinx, Altera, Lattice Semiconductor High speed FPGA host cards.

We need to clear USB compliance testing.

We would like to select LDO and optional Buck converter with ultra low noise, high PSRR and ultra fast load transient response.

Vin : +12VDC@1.0Amp

Vout : +3.3VDC@200mAmp

Ambient Operating Temperature (max) 30Deg C

Which Power Scheme will be better?

1. LDO for +12 VDC to +3.3VDC

2. Buck for +12VDC to +3.3VDC

3. LDO1 for +12VDC to +8VDC and LDO2 for +8VDC to +3.3VDC for better thermal management 

4. Buck for +12VDC to +5VDC and LDO for +5VDC to +3.3VDC 

Please guide us.

  • Hi Himanshu,

    The lowest noise LDO on the market is the TPS7A94 (1A output capable) which also has very high PSRR and fast transient response.  This is the clear choice for an LDO to use given your requirements (ultra low noise, high PSRR, fast transient response).  You will want a buck converter from 12V to 4V or so (5V is also fine).  I'll pass this thread to the switching converter team to suggest a DC/DC converter but I'll still be notified of updates incase you have questions on the TPS7A94 or another LDO.

    Thanks,

    Stephen

  • Dear Stephen,

    Thank you very much for your valuable response.

    In my last query, I would like to know out of four topologies of power schemes, which topology is best one from ultra low noise, high PSRR and ultra fast load transient response and specially thermal performance perspective.

  • Hi Himanshu,

    To obtain the least amount of noise, you'll want the last power converter supply power to the load to be an LDO.  For maximum thermal performance you'll want a switching converter in front of the LDO.  This is a common power architecture that is widely used.  Option 4 is what I would select.

    Thanks,

    Stephen

  • Dear Stephen,

    With Option -4, I am concerned about transient response of Buck which is always slower then LDO due to its external components of control loop compensation.

    It will affect Eye pattern during USB compliance test 

    Please guide.

  • Hi,

    You can use TPS561246.

  • Dear Shipeng, 

    Thank you so much to provide fast transient response switcher part. Actually, we really didn't aware about such switcher available which has LDO like transient and ripple response.

    Only point which may become bottleneck in this, is external inductor part which might affect transient response time, and all burden will go on layout management. Please provide recommended Layout or Gerber file link in this case. 

    Can you please suggest similar category parts which has Inductor integrated so that high current loop will be dramatically minimized and get better performance? 

    Our Technical Group was suggesting competitor part LTM8021 which has all components integrated to get better transient response. But they haven't provided Transient response performance of this parts till now. 

  • Hi, the inductor is integrated in the device or not won't affect transient response. But if you believe that, we also have TPSM861252 for you. Thabks.

  • Dear Shipeng,

    Thank you very much.

    Can you please provide PSRR Vs Frequency plots of both parts (1) TPS561246   (2) TPSM861252 ?

  • Hi,

    Usually there's no PSRR spec for buck converter because this spec is usually realized by LDO. But if you need this spec on buck converter, please see TPS62912 and TPSM82912. Thanks.

  • Dear Shipeng,

    Thank you very much for your support.

    As per yesterday meeting with my managers, we will go with LDO because of high quality PSRR and fast transient response. 

    They have anticipated about your guidance on below points to move quickly.

    1. Since we are designing USB3.2 Gen2, 2x2 Mode FMC Card which will run at 10Gbps Super-Speed, do we need ultra-fast transient response LDO? What will be the selection criteria (how much high dV/dt Or dI/dt ??) which we need to look into datasheet of LDO to select it? You can suggest us best suitable LDO in this Case. Our current requirement is 3.3V@500mA.

    2. In addition, with above Point#1, what will be PSRR performance we need to check while selecting LDO? How much dB rejection in frequency range starting from 120Hz to 10MHz we need to consider, e.g. we would like to know the specification like 110dB PSRR in the range of 120Hz to 100KHz and 90dB PSRR in the range of 100KHz to 10MHz....

    3. Communication speed will be 10Gbps so how we can get better PSRR at high frequency range starting from 1MHz to 10GHz range? Because PSRR figure will go down starting from 1MHz onwards in the LDO which is becoming bottleneck. How to get good PSRR in this high frequency range (to suppress power supply related noise interference in communication)? Are broadband capacitors on decoupling network help us in this?

    4. You can suggest us best LDO series which are suitable for High Speed Communication (10Gbps and above).

  • Hi Himanshu,

    I can only offer partial guidance to your questions.

    Discrete capacitors no longer look capacitive at frequencies below 100MHz.  Above 100MHz the capacitance you see is all interplane capacitance, thus you want your power and GND planes separated by a thin dielectric (even 10 mils is likely high).  Most customers would use a ferrite bead to increase the filtering at these high frequencies however the ferrite bead will act as a choke to any high speed load transients.  Thus if you add a ferrite bead after the LDO then your load transient performance will suffer and you will not get the performance that you need from the LDO.  Therefore it is better to place the ferrite bead in front of the LDO (between Vin source and Cin capacitor).  Even though Vin will have a slight delay in response to the load transient on the output of the LDO, you can usually raise Vin slightly and / or add a little more Cin to compensate for this.  The goal is to ensure the LDO output - or whatever is powering the load - has a clean output in terms of noise and transient response.

    You need to know what noise requirements exist on the load and what the noise is on Vin in order to determine the PSRR required for the LDO.

    We don't know what your di/dt transient requirements are so you'll need to obtain that before we can offer further guidance.  This requirement is usually unknown if the power supply powers a device that has firmware and / or software programming.  This is because the firmware / software programming determines the IO toggle frequency and strength of the BGA load and that is what determines the load transient amplitude and ramp rates.  Engineers usually choose to take measurements on an evaluation module with representative firmware / software installed to assess load transient requirements.  Alternatively this requirement may be handed to you from a systems engineer in charge of defining the requirements, but that is rare in my experience.

    Thanks,

    Stephen