DP83822H: Crystal Layout

Brian Wang0928

Part Number: DP83822H

Tool/software:

There is a recommendation for Crystal layout on competition MCU d/s as below layer 1/2/3. It looks there is a independent ground under Xstal.

We found a article below for layout suggestion. but there is no layout diagram to show how to do it. Is there detailed crystal layout suggestion with DP83822HRHBR? thanks.

snla290.pdf

Regards

Brian

10 months ago

0 Evan Mayhew 10 months ago

TI__Mastermind 24988 points

Hi Brian,

Please refer to this layout checklist to see an example for crystal layout:

https://www.ti.com/lit/zip/snlr048

Regarding the ground layout, we commonly see a solid ground plane reference on the layers below the crystal circuit to ensure constant impedance.

Thank you,

Evan

0 JANSON LIN 10 months ago in reply to Evan Mayhew

Prodigy 10 points

Hi,

There are two concern for the crystal reference plane, one is for constant impedance, another one is for high frequency impact.

for constant impedance, that is as your suggestion, but how to avoide the crystal high frequency impact the a solid ground plane?

0 Evan Mayhew 10 months ago in reply to JANSON LIN

TI__Mastermind 24988 points

Hi Janson,

Reference plane below crystal can be an island to isolate from the system:

Thank you,

Evan

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DP83822H: Crystal Layout