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DS90UB947-Q1EVM: 947/948 initialization

Part Number: DS90UB947-Q1EVM


Tool/software:

Hi Teams,

We have one issue need you help:

The display panel had been bulit before our Head Unit, and display panel had made a rule which 948 init by itself, 947 init by head unit.

So if display panel init 948 follow below steps:

1:display panel write 948 register A;

2:display panel write 948 register B;

3:display panel write 948 register C;

4:display panel write 948 register D;

Case A:If head unit write 948 register F between step2 and step3, whether this action would broken the 948's initialization?

Case B:If head unit write 948 register F at the same time with step3, whether this action would broken the 948's initialization?

Best Regards.

  • Hello,

    Happy to provide support on this matter. In order for me to provide the most effective support, please see follow-up questions below:

    • Can you please provide a block diagram of the system with relevant I2C controllers and targets? Specifically, where are the registers writes from the head unit and display unit originating from (i.e. SoC, MCU, 947 or 948, etc.)?
    • Can you provide a copy of the initialization script? It may be easier to look into this with the added context of the actual initialization script. 
    • Are the register names here (i.e. A, B, C, etc.) placeholder names or the hex values (i.e. 0xA, 0xB, etc.) of the registers? 

    Best,

    Nikolas

  • Hi Nikolas,

    The display panel had been bulit before our Head Unit, and display panel make a rule which 948 init by itself, 947 init by head unit. But head unit need to write/read 0x68 and 0x69 of 948, maybe display panel are writing 948's other registers at this time.

    So we want to kown whether this action would broken the 948's initialization?

    Best Regards.

  • Hello,

    What is the units on the time.sleep() command? Is this in milliseconds?

    In any case, what is pictured above should be acceptable. The 947 and 948 have two separate I2C busses and from what is being described, the display panel is writing to the 948 and the head unit is writing to the 947. From a purely I2C perspective, this is acceptable as the register writes will be occurring on entirely separate busses and will not be conflicting with one another.

    For future reference, if multiple devices try writing to the 948 (or any I2C target for that matter), this would cause a conflict at the arbiter, leading to I2C communication lock-up, as both transactions will be mixed. As long as multiple devices are not trying to communicate with the 948 at the exact same time, then I2C communication can occur properly. 

    Best,

    Nikolas