SN75DP139: DP->TMDS + EEPROM

Gabriel Vivas

Prodigy 10 points

Part Number: SN75DP139

Tool/software:

Good afternoon,

I am with a project that I have to make a change from DP to HDMI but the EDID reading is separate to the TMDS signals.

Could you help me with a reference schematic? of this type or a standard DP->HDMI one?

over 1 year ago

0 David (ASIC) Liu over 1 year ago

TI__Guru**** 183501 points

Hi,

DP139 is a passive level shifter which only supports DP++ to HDMI. For DP to HDMI, you would need an active protocol converter which we do not have in our product portfolio.

Thanks

David

0 Gabriel Vivas over 1 year ago in reply to David (ASIC) Liu

Prodigy 10 points

Thanks you!!

would you have reference schematics for DP++ to HDMI ?

0 David (ASIC) Liu over 1 year ago in reply to Gabriel Vivas

TI__Guru**** 183501 points

Hi,

Please see attached DP139 EVM schematic as a reference. The DP139 supports data rates up to 3.4 Gbps, is it sufficient to meet your design requirement?

1325.SN75DP139_HDMI_EVM_REV_B.pdf

Thanks

David

0 Gabriel Vivas over 1 year ago in reply to David (ASIC) Liu

Prodigy 10 points

Thank you very much David, yes, that data rate is sufficient for my design, on the other hand if the DP++ is source or sink the configuration pin configuration is the same?

ie. CEC and DAC are connected to a pull up resistor?

0 David (ASIC) Liu over 1 year ago in reply to Gabriel Vivas

TI__Guru**** 183501 points

Hi,

DP++ will always be a source, it can not be a sink.

For CEC, a DP++ Source device that supports a dual-mode HDMI cable adaptor and supports CEC must map the CEC signal to the CONFIG2 pin (pin 14) of the DP connector. Since DP139 is a Type-1 adaptor, CONFIG2 is pulled up to DP_PWR via a 27 KΩ resistor and diode in the HDMI cable adaptor. In the reference schematic I sent you earlier, it showed 26k pullup which should be 27k pullup, it is also missing the diode implementation which needs to be added.

Can you please clarify on the DAC?

Thanks

David

0 Gabriel Vivas over 1 year ago in reply to David (ASIC) Liu

Prodigy 10 points

Hello David,

I'm sorry, I was referring to pin 13 CAD (CONFIG1), I understand that it is similar to what you said about the CEC.

Thanks you

0 David (ASIC) Liu over 1 year ago in reply to Gabriel Vivas

TI__Guru**** 183501 points

Hi,

The upstream-facing CONFIG1 (CAD) signal must include a 100kΩ +/-10% pullup resistor terminated to DP_PWR. You can see that in the DP139 EVM schematic.

On the source side, CONFIG1 has a 1M pull down to GND.

Thanks

David

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SN75DP139: DP->TMDS + EEPROM