Other Parts Discussed in Thread: DP83869
Tool/software:
Hi,
We are using DP83869 in a design. Its planned to use a two supply configuration (ie no 1.8V to DP83869). The IC will thus use 3.3V, 2.5V, 1.1V.
Due to the power tree currently in design, the powering on sequence of the voltages is as follows:
3.3V, followed by 2.5V and then 1.1V. Its a cascaded scheme.
with ramping up enabled for power supplies, there would be less than 5 ms gap between 3.3V turning ON and 2.5V turning ON. Similarly less than 5 ms gap between 2.5V turning ON and 1.1V turning ON.
Qn1: Would it be allowed to power ON the DP83869 in this fashion.
If the answer for above is NO, we can also disable ramping for the power supplies, and it would then be < 150 us gap between 3.3V ON & 2.5V ON, and < 150 us gap between 2.5V ON & 1.1V ON
Not expecting much of current draw & associated issues with disabling ramping - this IC & use scenarios.
Qn2: Can we consider these time gaps (ie of the order of 100-200 us) as all three power supplies being turned ON simultaneously.
The datasheet recommends either of these two methods for turning ON the power:
--> Turn ON all simultaneously.
--> Or turn ON 2.5V & 1.1 simultaneously, followed by 3.3V (time gap between 2.5V/1.1V On and 3.3V ON to be less than 50 ms)
Thank you!!