TCAN4551-Q1: Schematic review

Hello Ivy,

I have reviewed the schematic and have the following comments:

A series resistor is recommended between the OSC1 pin and the crystal to help optimize the clock circuit for stable operation.  A 0-ohm resistor can be used initially until a different value is determined.  Please see the TCAN455x Clock Optimization and Design Guidelines Application Report (Link) for more information.

The capacitor C313 on the FLTR pin is less than the recommended minimum value of 300nF.  It is recommended to use a 330nF or larger capacitor to ensure the digital core LDO is stable.

It is more common to see the Common Mode Choke (CMC) located between the CANH and CANL pins and the termination resistors because the CAN standard calls for the termination resistors at the two ends of the CAN bus wires.  Placing the termination resistors R214 and R221 on the TCAN4551-Q1 side of the CMC will reduce the effectiveness of the termination resistors for the rest of the devices on the bus because the CMC is between the termination resistors and the CAN bus wires.

The GPO1 and SCLK pins appear to be shorted.  If so, these should not be shorted together.

The nINT and GPO2 pins appear to be shorted.  If so, these should not be shorted together.

The nINT pin does not appear to be used, but if it is, it is an open-drain pin that requires a pull-up resistor to the VIO (5V) supply.

The "VIN_ISO" voltage is not specified in the schematic, but it needs to be greater than 5.5V to prevent the device from entering an under-voltage or power-on reset condition.

Regards,

Jonathan