DP83869HM: power sequencing question when sequencing can't be followed

Shahar Sery

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Tool/software:

Hi,

For a new design we are considering the DP83869HM. Our board will use other components that use the same power rails as the DP83869HM, but require different sequencing.

I was wondering if we can pull the DP83869HM RESET_N LOW and hold it until all power rails are stable and all other components have been successfully powered then release the RESET_N.

Would this work properly? Is there anything we need to take care of when working in this way?

Thanks

10 months ago

0 Hillman Lin 10 months ago

TI__Mastermind 25955 points

Hi Sharhar,

May I ask what power up sequence are you using now for DP83869?

Regards,

Hillman lin

0 Shahar Sery 10 months ago in reply to Hillman Lin

Prodigy 20 points

Hi Hillman Lin,

The sequence will be - 3V3 -> 2V5 -> 1V8 -> 1V1, but time delays between those power rails is not yet defined and will be according to other ICs requirement. We have an FPGA on our PCB that will be the heart of the design and the sequencing will be according to its demands.

Kind regards,

Shahar

0 Hillman Lin 10 months ago in reply to Shahar Sery

TI__Mastermind 25955 points

Hi Sharhar,

Reset pin inside the PHY does not reset all the block internally (mainly reset the digital block of the PHY). In order to prevent PHY enter unknown stage, we still recommend follow the datasheet power up requirement.

Regards,

Hillman Lin

0 Shahar Sery 10 months ago in reply to Hillman Lin

Prodigy 20 points

Hi Hillman Lin,

So is there no other way to work around this from the IC perspective?

Kind regards,

Shahar

0 Hillman Lin 10 months ago in reply to Shahar Sery

TI__Mastermind 25955 points

Hi Shahar,

We would prefer add a delay on one of the power rail.

Regards,

Hillman Lin

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DP83869HM: power sequencing question when sequencing can't be followed